Commit 69f915cc authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher
Browse files

drm/amdgpu: loose check for umc poison mode 



No need to check poison setting for each channel, check for umc0
channel0 is enough.

Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f9ed188d

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c

+5 −13
Original line number Diff line number Diff line
@@ -451,21 +451,13 @@ static uint32_t umc_v6_7_query_ras_poison_mode_per_channel( 


static bool umc_v6_7_query_ras_poison_mode(struct amdgpu_device *adev)

{

	uint32_t umc_inst        = 0;

	uint32_t ch_inst         = 0;

	uint32_t umc_reg_offset  = 0;



	LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) {

		umc_reg_offset = get_umc_v6_7_reg_offset(adev,

							umc_inst,

							ch_inst);

		/* Enabling fatal error in one channel will be considered

		   as fatal error mode */

		if (umc_v6_7_query_ras_poison_mode_per_channel(adev, umc_reg_offset))

			return false;

	}



	return true;

	/* Enabling fatal error in umc instance0 channel0 will be

	 * considered as fatal error mode

	 */

	umc_reg_offset = get_umc_v6_7_reg_offset(adev, 0, 0);

	return !umc_v6_7_query_ras_poison_mode_per_channel(adev, umc_reg_offset);

}



const struct amdgpu_ras_block_hw_ops umc_v6_7_ras_hw_ops = {