Commit f9ed188d authored by Lang Yu's avatar Lang Yu Committed by Alex Deucher
Browse files

drm/amdgpu: add support for GC 10.1.4 



Add basic support for GC 10.1.4,
it uses same IP blocks with GC 10.1.3

Signed-off-by: default avatarLang Yu <Lang.Yu@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d8a25e48

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+6 −0
Original line number Diff line number Diff line
@@ -674,6 +674,7 @@ static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev) 
	case IP_VERSION(10, 1, 1):

	case IP_VERSION(10, 1, 2):

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

	case IP_VERSION(10, 3, 0):

	case IP_VERSION(10, 3, 1):

	case IP_VERSION(10, 3, 2):
@@ -709,6 +710,7 @@ static int amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device *adev) 
	case IP_VERSION(10, 1, 1):

	case IP_VERSION(10, 1, 2):

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

	case IP_VERSION(10, 3, 0):

	case IP_VERSION(10, 3, 1):

	case IP_VERSION(10, 3, 2):
@@ -910,6 +912,7 @@ static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev) 
	case IP_VERSION(10, 1, 2):

	case IP_VERSION(10, 1, 1):

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

	case IP_VERSION(10, 3, 0):

	case IP_VERSION(10, 3, 2):

	case IP_VERSION(10, 3, 1):
@@ -1044,6 +1047,7 @@ static int amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device *adev) 
	case IP_VERSION(10, 1, 1):

	case IP_VERSION(10, 1, 2):

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

	case IP_VERSION(10, 3, 0):

	case IP_VERSION(10, 3, 1):

	case IP_VERSION(10, 3, 2):
@@ -1243,6 +1247,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
	case IP_VERSION(10, 1, 1):

	case IP_VERSION(10, 1, 2):

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

	case IP_VERSION(10, 3, 0):

	case IP_VERSION(10, 3, 2):

	case IP_VERSION(10, 3, 4):
@@ -1264,6 +1269,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
	case IP_VERSION(9, 2, 2):

	case IP_VERSION(9, 3, 0):

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

	case IP_VERSION(10, 3, 1):

	case IP_VERSION(10, 3, 3):

		adev->flags |= AMD_IS_APU;

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+2 −1
Original line number Diff line number Diff line
@@ -137,7 +137,8 @@ static int psp_early_init(void *handle) 
		psp->autoload_supported = true;

		break;

	case IP_VERSION(11, 0, 8):

		if (adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2) {

		if (adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2 ||

		    adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 4)) {

			psp_v11_0_8_set_psp_funcs(psp);

			psp->autoload_supported = false;

		}

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+9 −0
Original line number Diff line number Diff line
@@ -3641,6 +3641,7 @@ static void gfx_v10_0_init_golden_registers(struct amdgpu_device *adev) 
						(const u32)ARRAY_SIZE(golden_settings_gc_10_3_5));

		break;

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

		soc15_program_register_sequence(adev,

						golden_settings_gc_10_0_cyan_skillfish,

						(const u32)ARRAY_SIZE(golden_settings_gc_10_0_cyan_skillfish));
@@ -3819,6 +3820,7 @@ static void gfx_v10_0_check_fw_write_wait(struct amdgpu_device *adev) 
	case IP_VERSION(10, 1, 2):

	case IP_VERSION(10, 1, 1):

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

		if ((adev->gfx.me_fw_version >= 0x00000046) &&

		    (adev->gfx.me_feature_version >= 27) &&

		    (adev->gfx.pfp_fw_version >= 0x00000068) &&
@@ -3959,6 +3961,9 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev) 
		else

			chip_name = "cyan_skillfish";

		break;

	case IP_VERSION(10, 1, 4):

		chip_name = "cyan_skillfish2";

		break;

	default:

		BUG();

	}
@@ -4565,6 +4570,7 @@ static void gfx_v10_0_gpu_early_init(struct amdgpu_device *adev) 
			1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS);

		break;

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

		adev->gfx.config.max_hw_contexts = 8;

		adev->gfx.config.sc_prim_fifo_size_frontend = 0x20;

		adev->gfx.config.sc_prim_fifo_size_backend = 0x100;
@@ -4677,6 +4683,7 @@ static int gfx_v10_0_sw_init(void *handle) 
	case IP_VERSION(10, 1, 1):

	case IP_VERSION(10, 1, 2):

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

		adev->gfx.me.num_me = 1;

		adev->gfx.me.num_pipe_per_me = 1;

		adev->gfx.me.num_queue_per_pipe = 1;
@@ -7658,6 +7665,7 @@ static int gfx_v10_0_early_init(void *handle) 
	case IP_VERSION(10, 1, 1):

	case IP_VERSION(10, 1, 2):

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

		adev->gfx.num_gfx_rings = GFX10_NUM_GFX_RINGS_NV1X;

		break;

	case IP_VERSION(10, 3, 0):
@@ -9418,6 +9426,7 @@ static void gfx_v10_0_set_rlc_funcs(struct amdgpu_device *adev) 
	case IP_VERSION(10, 1, 10):

	case IP_VERSION(10, 1, 1):

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

	case IP_VERSION(10, 3, 2):

	case IP_VERSION(10, 3, 1):

	case IP_VERSION(10, 3, 4):

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

+3 −1
Original line number Diff line number Diff line
@@ -881,6 +881,7 @@ static int gmc_v10_0_sw_init(void *handle) 
	case IP_VERSION(10, 1, 1):

	case IP_VERSION(10, 1, 2):

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

	case IP_VERSION(10, 3, 0):

	case IP_VERSION(10, 3, 2):

	case IP_VERSION(10, 3, 1):
@@ -1156,7 +1157,8 @@ static void gmc_v10_0_get_clockgating_state(void *handle, u32 *flags) 
{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 3))

	if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 3) ||

	    adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 4))

		return;



	adev->mmhub.funcs->get_clockgating(adev, flags);

drivers/gpu/drm/amd/amdgpu/nv.c

+1 −0
Original line number Diff line number Diff line
@@ -902,6 +902,7 @@ static int nv_common_early_init(void *handle) 
			adev->external_rev_id = adev->rev_id + 0x01;

		break;

	case IP_VERSION(10, 1, 3):

	case IP_VERSION(10, 1, 4):

		adev->cg_flags = 0;

		adev->pg_flags = 0;

		adev->external_rev_id = adev->rev_id + 0x82;