Commit 697b6e28 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-5.15-2021-08-20' of... 

Merge tag 'amd-drm-next-5.15-2021-08-20' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-next

amd-drm-next-5.15-2021-08-20:

amdgpu:
- embed hw fence into job
- Misc SMU fixes
- PSP TA code cleanup
- RAS fixes
- PWM fan speed fixes
- DC workqueue cleanups
- SR-IOV fixes
- gfxoff delayed work fix
- Pin domain check fix

amdkfd:
- SVM fixes

radeon:
- Code cleanup

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210820172335.4190-1-alexander.deucher@amd.com
parents 397ab98e 90a92662

drivers/gpu/drm/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -256,7 +256,6 @@ config DRM_AMDGPU 
	select HWMON

	select BACKLIGHT_CLASS_DEVICE

	select INTERVAL_TREE

	select CHASH

	help

	  Choose this option if you have a recent AMD Radeon graphics card.

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+2 −0
Original line number Diff line number Diff line
@@ -1271,6 +1271,8 @@ int emu_soc_asic_init(struct amdgpu_device *adev); 


#define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));



#define MIN(X, Y) ((X) < (Y) ? (X) : (Y))



/* Common functions */

bool amdgpu_device_has_job_running(struct amdgpu_device *adev);

bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

+0 −1
Original line number Diff line number Diff line
@@ -714,7 +714,6 @@ int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine, 
	ret = dma_fence_wait(f, false);



err_ib_sched:

	dma_fence_put(f);

	amdgpu_job_free(job);

err:

	return ret;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

+31 −0
Original line number Diff line number Diff line
@@ -560,6 +560,9 @@ static int kgd_hqd_destroy(struct kgd_dev *kgd, void *mqd, 
	case KFD_PREEMPT_TYPE_WAVEFRONT_RESET:

		type = RESET_WAVES;

		break;

	case KFD_PREEMPT_TYPE_WAVEFRONT_SAVE:

		type = SAVE_WAVES;

		break;

	default:

		type = DRAIN_PIPE;

		break;
@@ -754,6 +757,33 @@ static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid, 
	adev->gfxhub.funcs->setup_vm_pt_regs(adev, vmid, page_table_base);

}



static void program_trap_handler_settings(struct kgd_dev *kgd,

		uint32_t vmid, uint64_t tba_addr, uint64_t tma_addr)

{

	struct amdgpu_device *adev = get_amdgpu_device(kgd);



	lock_srbm(kgd, 0, 0, 0, vmid);



	/*

	 * Program TBA registers

	 */

	WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_LO),

			lower_32_bits(tba_addr >> 8));

	WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_HI),

			upper_32_bits(tba_addr >> 8) |

			(1 << SQ_SHADER_TBA_HI__TRAP_EN__SHIFT));



	/*

	 * Program TMA registers

	 */

	WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_LO),

			lower_32_bits(tma_addr >> 8));

	WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_HI),

			upper_32_bits(tma_addr >> 8));



	unlock_srbm(kgd);

}



const struct kfd2kgd_calls gfx_v10_kfd2kgd = {

	.program_sh_mem_settings = kgd_program_sh_mem_settings,

	.set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
@@ -774,4 +804,5 @@ const struct kfd2kgd_calls gfx_v10_kfd2kgd = { 
	.get_atc_vmid_pasid_mapping_info =

			get_atc_vmid_pasid_mapping_info,

	.set_vm_context_page_table_base = set_vm_context_page_table_base,

	.program_trap_handler_settings = program_trap_handler_settings,

};

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

+31 −0
Original line number Diff line number Diff line
@@ -537,6 +537,9 @@ static int hqd_destroy_v10_3(struct kgd_dev *kgd, void *mqd, 
	case KFD_PREEMPT_TYPE_WAVEFRONT_RESET:

		type = RESET_WAVES;

		break;

	case KFD_PREEMPT_TYPE_WAVEFRONT_SAVE:

		type = SAVE_WAVES;

		break;

	default:

		type = DRAIN_PIPE;

		break;
@@ -658,6 +661,33 @@ static void set_vm_context_page_table_base_v10_3(struct kgd_dev *kgd, uint32_t v 
	adev->gfxhub.funcs->setup_vm_pt_regs(adev, vmid, page_table_base);

}



static void program_trap_handler_settings_v10_3(struct kgd_dev *kgd,

			uint32_t vmid, uint64_t tba_addr, uint64_t tma_addr)

{

	struct amdgpu_device *adev = get_amdgpu_device(kgd);



	lock_srbm(kgd, 0, 0, 0, vmid);



	/*

	 * Program TBA registers

	 */

	WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_LO),

			lower_32_bits(tba_addr >> 8));

	WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_HI),

			upper_32_bits(tba_addr >> 8) |

			(1 << SQ_SHADER_TBA_HI__TRAP_EN__SHIFT));



	/*

	 * Program TMA registers

	 */

	WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_LO),

			lower_32_bits(tma_addr >> 8));

	WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_HI),

			 upper_32_bits(tma_addr >> 8));



	unlock_srbm(kgd);

}



#if 0

uint32_t enable_debug_trap_v10_3(struct kgd_dev *kgd,

				uint32_t trap_debug_wave_launch_mode,
@@ -820,6 +850,7 @@ const struct kfd2kgd_calls gfx_v10_3_kfd2kgd = { 
	.address_watch_get_offset = address_watch_get_offset_v10_3,

	.get_atc_vmid_pasid_mapping_info = NULL,

	.set_vm_context_page_table_base = set_vm_context_page_table_base_v10_3,

	.program_trap_handler_settings = program_trap_handler_settings_v10_3,

#if 0

	.enable_debug_trap = enable_debug_trap_v10_3,

	.disable_debug_trap = disable_debug_trap_v10_3,