x86/microcode/intel: Rip out mixed stepping support for Intel CPUs

mainline inclusion
from mainline-v6.7-rc1
commit ae76d951f6537001bdf77894d19cd4a446de337e
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I8XRMW


CVE: NA

--------------------------------

Mixed steppings aren't supported on Intel CPUs. Only one microcode patch
is required for the entire system. The caching of microcode blobs which
match the family and model is therefore pointless and in fact is
dysfunctional as CPU hotplug updates use only a single microcode blob,
i.e. the one where *intel_ucode_patch points to.

Remove the microcode cache and make it an AMD local feature.

  [ tglx:
     - save only at the end. Otherwise random microcode ends up in the
  	  pointer for early loading
     - free the ucode patch pointer in save_microcode_patch() only
    after kmemdup() has succeeded, as reported by Andrew Cooper ]

Intel-SIG: commit ae76d951f653 x86/microcode/intel: Rip out mixed stepping support for Intel CPUs.
Microcode restructuring backport.

Originally-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20231017211722.404362809@linutronix.de


[ Aubrey Li: amend commit log ]
Signed-off-by: Aubrey Li <aubrey.li@linux.intel.com>