Commit 6340f9fd authored by Oleksij Rempel's avatar Oleksij Rempel Committed by David S. Miller
Browse files

net: phy: migrate phy_init_eee() to genphy_c45_eee_is_active() 



Reduce code duplicated by migrating phy_init_eee() to
genphy_c45_eee_is_active().

Signed-off-by: default avatarOleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5827b168

drivers/net/phy/phy.c

+14 −75
Original line number Diff line number Diff line
@@ -1457,30 +1457,6 @@ void phy_mac_interrupt(struct phy_device *phydev) 
}

EXPORT_SYMBOL(phy_mac_interrupt);



static void mmd_eee_adv_to_linkmode(unsigned long *advertising, u16 eee_adv)

{

	linkmode_zero(advertising);



	if (eee_adv & MDIO_EEE_100TX)

		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT,

				 advertising);

	if (eee_adv & MDIO_EEE_1000T)

		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,

				 advertising);

	if (eee_adv & MDIO_EEE_10GT)

		linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,

				 advertising);

	if (eee_adv & MDIO_EEE_1000KX)

		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,

				 advertising);

	if (eee_adv & MDIO_EEE_10GKX4)

		linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,

				 advertising);

	if (eee_adv & MDIO_EEE_10GKR)

		linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,

				 advertising);

}



/**

 * phy_init_eee - init and check the EEE feature

 * @phydev: target phy_device struct
@@ -1493,62 +1469,25 @@ static void mmd_eee_adv_to_linkmode(unsigned long *advertising, u16 eee_adv) 
 */

int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)

{

	int ret;



	if (!phydev->drv)

		return -EIO;



	/* According to 802.3az,the EEE is supported only in full duplex-mode.

	 */

	if (phydev->duplex == DUPLEX_FULL) {

		__ETHTOOL_DECLARE_LINK_MODE_MASK(common);

		__ETHTOOL_DECLARE_LINK_MODE_MASK(lp);

		__ETHTOOL_DECLARE_LINK_MODE_MASK(adv);

		int eee_lp, eee_cap, eee_adv;

		int status;

		u32 cap;



		/* Read phy status to properly get the right settings */

		status = phy_read_status(phydev);

		if (status)

			return status;



		/* First check if the EEE ability is supported */

		eee_cap = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);

		if (eee_cap <= 0)

			goto eee_exit_err;



		cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);

		if (!cap)

			goto eee_exit_err;



		/* Check which link settings negotiated and verify it in

		 * the EEE advertising registers.

		 */

		eee_lp = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);

		if (eee_lp <= 0)

			goto eee_exit_err;



		eee_adv = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV);

		if (eee_adv <= 0)

			goto eee_exit_err;



		mmd_eee_adv_to_linkmode(adv, eee_adv);

		mmd_eee_adv_to_linkmode(lp, eee_lp);

		linkmode_and(common, adv, lp);



		if (!phy_check_valid(phydev->speed, phydev->duplex, common))

			goto eee_exit_err;

	ret = genphy_c45_eee_is_active(phydev, NULL, NULL, NULL);

	if (ret < 0)

		return ret;

	if (!ret)

		return -EPROTONOSUPPORT;



	if (clk_stop_enable)

		/* Configure the PHY to stop receiving xMII

		 * clock while it is signaling LPI.

		 */

			phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1,

		ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1,

				       MDIO_PCS_CTRL1_CLKSTOP_EN);



		return 0; /* EEE supported */

	}

eee_exit_err:

	return -EPROTONOSUPPORT;

	return ret < 0 ? ret : 0;

}

EXPORT_SYMBOL(phy_init_eee);