Commit 61a60d79 authored by José Roberto de Souza's avatar José Roberto de Souza
Browse files

drm/i915: Do not set any power wells when there is no display 



Power wells are only part of display block and not necessary when
running a headless driver.

Reviewed-by: default avatarRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210408203150.237947-2-jose.souza@intel.com
parent a844cfbe

drivers/gpu/drm/i915/display/intel_display_power.c

+4 −1
Original line number Diff line number Diff line
@@ -4674,7 +4674,10 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) 
	 * The enabling order will be from lower to higher indexed wells,

	 * the disabling order is reversed.

	 */

	if (IS_ALDERLAKE_S(dev_priv) || IS_DG1(dev_priv)) {

	if (!HAS_DISPLAY(dev_priv)) {

		power_domains->power_well_count = 0;

		err = 0;

	} else if (IS_ALDERLAKE_S(dev_priv) || IS_DG1(dev_priv)) {

		err = set_power_wells_mask(power_domains, tgl_power_wells,

					   BIT_ULL(TGL_DISP_PW_TC_COLD_OFF));

	} else if (IS_ROCKETLAKE(dev_priv)) {