Commit 6123e744 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Bjorn Andersson
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arm64: dts: sdm845: Add sdhc opps and power-domains 



Add the power domain supporting performance state and the corresponding
OPP tables for the sdhc device on sdm845.

Reviewed-by: default avatarMatthias Kaehlcke <mka@chromium.org>
Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1593506712-24557-4-git-send-email-rnayak@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent d91ea1e0

arch/arm64/boot/dts/qcom/sdm845.dtsi

+26 −0
Original line number Original line Diff line number Diff line
@@ -3279,8 +3279,34 @@ 
				 <&gcc GCC_SDCC2_APPS_CLK>;

				 <&gcc GCC_SDCC2_APPS_CLK>;

			clock-names = "iface", "core";

			clock-names = "iface", "core";

			iommus = <&apps_smmu 0xa0 0xf>;

			iommus = <&apps_smmu 0xa0 0xf>;

			power-domains = <&rpmhpd SDM845_CX>;

			operating-points-v2 = <&sdhc2_opp_table>;





			status = "disabled";

			status = "disabled";



			sdhc2_opp_table: sdhc2-opp-table {

				compatible = "operating-points-v2";



				opp-9600000 {

					opp-hz = /bits/ 64 <9600000>;

					required-opps = <&rpmhpd_opp_min_svs>;

				};



				opp-19200000 {

					opp-hz = /bits/ 64 <19200000>;

					required-opps = <&rpmhpd_opp_low_svs>;

				};



				opp-100000000 {

					opp-hz = /bits/ 64 <100000000>;

					required-opps = <&rpmhpd_opp_svs>;

				};



				opp-201500000 {

					opp-hz = /bits/ 64 <201500000>;

					required-opps = <&rpmhpd_opp_svs_l1>;

				};

			};

		};

		};





		qspi_opp_table: qspi-opp-table {

		qspi_opp_table: qspi-opp-table {