Commit 5f38c3fb authored by Dale B Stimson's avatar Dale B Stimson Committed by Tvrtko Ursulin
Browse files

drm/i915/pcode: Add a couple of pcode helpers 



Some dGfx pcode commands take additional sub-commands and parameters. Add a
couple of helpers to help formatting these commands to improve code
readability.

v2: Fixed commit author (Rodrigo)
v3: Function rename and convert to new uncore interface for pcode functions
    Remove unnecessary #define's (Andi)
v4: Another function rename

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: default avatarDale B Stimson <dale.b.stimson@intel.com>
Signed-off-by: default avatarAshutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220519085732.1276255-3-tvrtko.ursulin@linux.intel.com
parent ee421bb4

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -6674,6 +6674,9 @@ 


#define GEN6_PCODE_MAILBOX			_MMIO(0x138124)

#define   GEN6_PCODE_READY			(1 << 31)

#define   GEN6_PCODE_MB_PARAM2			REG_GENMASK(23, 16)

#define   GEN6_PCODE_MB_PARAM1			REG_GENMASK(15, 8)

#define   GEN6_PCODE_MB_COMMAND			REG_GENMASK(7, 0)

#define   GEN6_PCODE_ERROR_MASK			0xFF

#define     GEN6_PCODE_SUCCESS			0x0

#define     GEN6_PCODE_ILLEGAL_CMD		0x1

drivers/gpu/drm/i915/intel_pcode.c

+32 −0
Original line number Diff line number Diff line
@@ -214,3 +214,35 @@ int intel_pcode_init(struct intel_uncore *uncore) 
				 DG1_UNCORE_INIT_STATUS_COMPLETE,

				 DG1_UNCORE_INIT_STATUS_COMPLETE, 180000);

}



int snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 *val)

{

	intel_wakeref_t wakeref;

	u32 mbox;

	int err;



	mbox = REG_FIELD_PREP(GEN6_PCODE_MB_COMMAND, mbcmd)

		| REG_FIELD_PREP(GEN6_PCODE_MB_PARAM1, p1)

		| REG_FIELD_PREP(GEN6_PCODE_MB_PARAM2, p2);



	with_intel_runtime_pm(uncore->rpm, wakeref)

		err = snb_pcode_read(uncore, mbox, val, NULL);



	return err;

}



int snb_pcode_write_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 val)

{

	intel_wakeref_t wakeref;

	u32 mbox;

	int err;



	mbox = REG_FIELD_PREP(GEN6_PCODE_MB_COMMAND, mbcmd)

		| REG_FIELD_PREP(GEN6_PCODE_MB_PARAM1, p1)

		| REG_FIELD_PREP(GEN6_PCODE_MB_PARAM2, p2);



	with_intel_runtime_pm(uncore->rpm, wakeref)

		err = snb_pcode_write(uncore, mbox, val);



	return err;

}

drivers/gpu/drm/i915/intel_pcode.h

+6 −0
Original line number Diff line number Diff line
@@ -21,4 +21,10 @@ int skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request, 


int intel_pcode_init(struct intel_uncore *uncore);



/*

 * Helpers for dGfx PCODE mailbox command formatting

 */

int snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 *val);

int snb_pcode_write_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 val);



#endif /* _INTEL_PCODE_H */