Commit 5f30bf18 authored by David E. Box's avatar David E. Box Committed by jiayingbao
Browse files

platform/x86/intel/vsec: Rework early hardware code

mainline inclusion
from mainline-v6.0-rc1
commit f21c179e
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I8WO3U
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f21c179e1206e88d187d517d97d270c6492d4673



-------------------------------------

In the Intel VSEC PCI driver, use a new VSEC_QUIRK_EARLY_HW flag in
driver_data to indicate the need for early hardware quirks in
auxiliary devices. Remove the separate PCI ID list maintained by the
Intel PMT auxiliary driver.

Intel-SIG: commit f21c179e platform/x86/intel/vsec: Rework early hardware code.
Backport Intel_pmt to auxiliary bus and important bug fix.

Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
Signed-off-by: default avatarDavid E. Box <david.e.box@linux.intel.com>
Signed-off-by: default avatarGayatri Kammela <gayatri.kammela@linux.intel.com>
Link: https://lore.kernel.org/r/20220629221334.434307-2-gayatri.kammela@linux.intel.com


Reviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
[ Yingbao Jia: amend commit log ]
Signed-off-by: default avatarYingbao Jia <yingbao.jia@intel.com>
parent 9e0b5e61
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment