Merge tag 'gpio-updates-for-v5.13-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

    gpio_mockup_ranges

        This parameter takes an argument in the form of an array of integer

        pairs. Each pair defines the base GPIO number (if any) and the number

        of lines exposed by the chip. If the base GPIO is -1, the gpiolib

        will assign it automatically.

        pairs. Each pair defines the base GPIO number (non-negative integer)

        and the first number after the last of this chip. If the base GPIO

        is -1, the gpiolib will assign it automatically. while the following

        parameter is the number of lines exposed by the chip.

        Example: gpio_mockup_ranges=-1,8,-1,16,405,4

        Example: gpio_mockup_ranges=-1,8,-1,16,405,409

        The line above creates three chips. The first one will expose 8 lines,

        the second 16 and the third 4. The base GPIO for the third chip is set

        to 405 while for two first chips it will be assigned automatically.

    gpio_named_lines

    gpio_mockup_named_lines

        This parameter doesn't take any arguments. It lets the driver know that

        GPIO lines exposed by it should be named.

			Don't use this when you are not running on the

			android emulator

	gpio-mockup.gpio_mockup_ranges

			[HW] Sets the ranges of gpiochip of for this device.

			Format: <start1>,<end1>,<start2>,<end2>...

	gpio-mockup.gpio_mockup_named_lines

			[HW] Let the driver know GPIO lines should be named.

	gpt		[EFI] Forces disk with valid GPT signature but

			invalid Protective MBR to be treated as GPT. If the

			primary GPT is corrupted, it enables the backup/alternate

			Format: <unsigned int> such that (rxsize & ~0x1fffc0) == 0.

			Default: 1024

	gpio-mockup.gpio_mockup_ranges

			[HW] Sets the ranges of gpiochip of for this device.

			Format: <start1>,<end1>,<start2>,<end2>...

	hardlockup_all_cpu_backtrace=

			[KNL] Should the hard-lockup detector generate

			backtraces on all cpus.

================

An interrupt controller driver creates and registers an irq_domain by

calling one of the irq_domain_add_*() functions (each mapping method

has a different allocator function, more on that later).  The function

will return a pointer to the irq_domain on success.  The caller must

provide the allocator function with an irq_domain_ops structure.

calling one of the irq_domain_add_*() or irq_domain_create_*() functions

(each mapping method has a different allocator function, more on that later).

The function will return a pointer to the irq_domain on success. The caller

must provide the allocator function with an irq_domain_ops structure.

In most cases, the irq_domain will begin empty without any mappings

between hwirq and IRQ numbers.  Mappings are added to the irq_domain

	irq_domain_add_simple()

	irq_domain_add_legacy()

	irq_domain_add_legacy_isa()

	irq_domain_create_simple()

	irq_domain_create_legacy()

The Legacy mapping is a special case for drivers that already have a

mapping Linux IRQs 0-15 so that existing ISA drivers get the correct IRQ

numbers.

Most users of legacy mappings should use irq_domain_add_simple() which

will use a legacy domain only if an IRQ range is supplied by the

system and will otherwise use a linear domain mapping. The semantics

of this call are such that if an IRQ range is specified then

Most users of legacy mappings should use irq_domain_add_simple() or

irq_domain_create_simple() which will use a legacy domain only if an IRQ range

is supplied by the system and will otherwise use a linear domain mapping.

The semantics of this call are such that if an IRQ range is specified then

descriptors will be allocated on-the-fly for it, and if no range is

specified it will fall through to irq_domain_add_linear() which means

*no* irq descriptors will be allocated.

specified it will fall through to irq_domain_add_linear() or

irq_domain_create_linear() which means *no* irq descriptors will be allocated.

A typical use case for simple domains is where an irqchip provider

is supporting both dynamic and static IRQ assignments.

before any irq_find_mapping() since the latter will actually work

for the static IRQ assignment case.

irq_domain_add_simple() and irq_domain_create_simple() as well as

irq_domain_add_legacy() and irq_domain_create_legacy() are functionally

equivalent, except for the first argument is different - the former

accepts an Open Firmware specific 'struct device_node', while the latter

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/gpio/fairchild,74hc595.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Generic 8-bit shift register

maintainers:

  - Maxime Ripard <mripard@kernel.org>

properties:

  compatible:

    enum:

      - fairchild,74hc595

      - nxp,74lvc594

  reg:

    maxItems: 1

  gpio-controller: true

  '#gpio-cells':

    description:

      The second cell is only used to specify the GPIO polarity.

    const: 2

  registers-number:

    description: Number of daisy-chained shift registers

  enable-gpios:

    description: GPIO connected to the OE (Output Enable) pin.

    maxItems: 1

  spi-max-frequency: true

patternProperties:

  "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$":

    type: object

    properties:

      gpio-hog: true

      gpios: true

      output-high: true

      output-low: true

      line-name: true

    required:

      - gpio-hog

      - gpios

    additionalProperties: false

required:

  - compatible

  - reg

  - gpio-controller

  - '#gpio-cells'

  - registers-number

additionalProperties: false

examples:

  - |

    spi {

            #address-cells = <1>;

            #size-cells = <0>;

            gpio5: gpio5@0 {

                    compatible = "fairchild,74hc595";

                    reg = <0>;

                    gpio-controller;

                    #gpio-cells = <2>;

                    registers-number = <4>;

                    spi-max-frequency = <100000>;

            };

    };

* Generic 8-bits shift register GPIO driver

Required properties:

- compatible: Should contain one of the following:

    "fairchild,74hc595"

    "nxp,74lvc594"

- reg : chip select number

- gpio-controller : Marks the device node as a gpio controller.

- #gpio-cells : Should be two.  The first cell is the pin number and

  the second cell is used to specify the gpio polarity:

      0 = active high

      1 = active low

- registers-number: Number of daisy-chained shift registers

Optional properties:

- enable-gpios: GPIO connected to the OE (Output Enable) pin.

Example:

gpio5: gpio5@0 {

	compatible = "fairchild,74hc595";

	reg = <0>;

	gpio-controller;

	#gpio-cells = <2>;

	registers-number = <4>;

	spi-max-frequency = <100000>;

};