Commit 44495295 authored by Johan Jonker's avatar Johan Jonker Committed by Bartosz Golaszewski
Browse files

dt-bindings: gpio: add YAML description for rockchip,gpio-bank 



Current dts files with "rockchip,gpio-bank" subnodes
are manually verified. In order to automate this process
the text that describes the compatible in rockchip,pinctrl.txt
is removed and converted to YAML in rockchip,gpio-bank.yaml.

Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarBartosz Golaszewski <bgolaszewski@baylibre.com>
parent e29eaf1c

Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml

0 → 100644
+82 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Rockchip GPIO bank



maintainers:

  - Heiko Stuebner <heiko@sntech.de>



properties:

  compatible:

    enum:

      - rockchip,gpio-bank

      - rockchip,rk3188-gpio-bank0



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    maxItems: 1



  gpio-controller: true



  "#gpio-cells":

    const: 2



  interrupt-controller: true



  "#interrupt-cells":

    const: 2



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - gpio-controller

  - "#gpio-cells"

  - interrupt-controller

  - "#interrupt-cells"



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    pinctrl: pinctrl {

      #address-cells = <1>;

      #size-cells = <1>;

      ranges;



      gpio0: gpio@2000a000 {

        compatible = "rockchip,rk3188-gpio-bank0";

        reg = <0x2000a000 0x100>;

        interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&clk_gates8 9>;



        gpio-controller;

        #gpio-cells = <2>;



        interrupt-controller;

        #interrupt-cells = <2>;

      };



      gpio1: gpio@2003c000 {

        compatible = "rockchip,gpio-bank";

        reg = <0x2003c000 0x100>;

        interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&clk_gates8 10>;



        gpio-controller;

        #gpio-cells = <2>;



        interrupt-controller;

        #interrupt-cells = <2>;

      };

    };

Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt

+1 −57
Original line number Diff line number Diff line
@@ -50,23 +50,7 @@ Deprecated properties for iomux controller: 
	 Use rockchip,grf and rockchip,pmu described above instead.



Required properties for gpio sub nodes:

  - compatible: "rockchip,gpio-bank"

  - reg: register of the gpio bank (different than the iomux registerset)

  - interrupts: base interrupt of the gpio bank in the interrupt controller

  - clocks: clock that drives this bank

  - gpio-controller: identifies the node as a gpio controller and pin bank.

  - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO

    binding is used, the amount of cells must be specified as 2. See generic

    GPIO binding documentation for description of particular cells.

  - interrupt-controller: identifies the controller node as interrupt-parent.

  - #interrupt-cells: the value of this property should be 2 and the interrupt

    cells should use the standard two-cell scheme described in

    bindings/interrupt-controller/interrupts.txt



Deprecated properties for gpio sub nodes:

  - compatible: "rockchip,rk3188-gpio-bank0"

  - reg: second element: separate pull register for rk3188 bank0, use

	 rockchip,pmu described above instead

See rockchip,gpio-bank.yaml



Required properties for pin configuration node:

  - rockchip,pins: 3 integers array, represents a group of pins mux and config
@@ -127,43 +111,3 @@ uart2: serial@20064000 { 
	pinctrl-names = "default";

	pinctrl-0 = <&uart2_xfer>;

};
 


Example for rk3188:



	pinctrl@20008000 {

		compatible = "rockchip,rk3188-pinctrl";

		rockchip,grf = <&grf>;

		rockchip,pmu = <&pmu>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		gpio0: gpio0@2000a000 {

			compatible = "rockchip,rk3188-gpio-bank0";

			reg = <0x2000a000 0x100>;

			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_gates8 9>;



			gpio-controller;

			#gpio-cells = <2>;



			interrupt-controller;

			#interrupt-cells = <2>;

		};



		gpio1: gpio1@2003c000 {

			compatible = "rockchip,gpio-bank";

			reg = <0x2003c000 0x100>;

			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_gates8 10>;



			gpio-controller;

			#gpio-cells = <2>;



			interrupt-controller;

			#interrupt-cells = <2>;

		};



		...



	};