Commit 5cacb2c7 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'dpaa-phylink' 



Sean Anderson says:

====================
net: dpaa: Convert to phylink

This series converts the DPAA driver to phylink.

I have tried to maintain backwards compatibility with existing device
trees whereever possible. However, one area where I was unable to
achieve this was with QSGMII. Please refer to patch 2 for details.

All mac drivers have now been converted. I would greatly appreciate if
anyone has T-series or P-series boards they can test/debug this series
on. I only have an LS1046ARDB. Everything but QSGMII should work without
breakage; QSGMII needs patches 7 and 8. For this reason, the last 4
patches in this series should be applied together (and should not go
through separate trees).

Changes in v7:
- provide phylink_validate_mask_caps() helper
- Fix oops if memac_pcs_create returned -EPROBE_DEFER
- Fix using pcs-names instead of pcs-handle-names
- Fix not checking for -ENODATA when looking for sgmii pcs
- Fix 81-character line
- Simplify memac_validate with phylink_validate_mask_caps

Changes in v6:
- Remove unnecessary $ref from renesas,rzn1-a5psw
- Remove unnecessary type from pcs-handle-names
- Add maxItems to pcs-handle
- Fix 81-character line
- Fix uninitialized variable in dtsec_mac_config

Changes in v5:
- Add Lynx PCS binding

Changes in v4:
- Use pcs-handle-names instead of pcs-names, as discussed
- Don't fail if phy support was not compiled in
- Split off rate adaptation series
- Split off DPAA "preparation" series
- Split off Lynx 10G support
- t208x: Mark MAC1 and MAC2 as 10G
- Add XFI PCS for t208x MAC1/MAC2

Changes in v3:
- Expand pcs-handle to an array
- Add vendor prefix 'fsl,' to rgmii and mii properties.
- Set maxItems for pcs-names
- Remove phy-* properties from example because dt-schema complains and I
  can't be bothered to figure out how to make it work.
- Add pcs-handle as a preferred version of pcsphy-handle
- Deprecate pcsphy-handle
- Remove mii/rmii properties
- Put the PCS mdiodev only after we are done with it (since the PCS
  does not perform a get itself).
- Remove _return label from memac_initialization in favor of returning
  directly
- Fix grabbing the default PCS not checking for -ENODATA from
  of_property_match_string
- Set DTSEC_ECNTRL_R100M in dtsec_link_up instead of dtsec_mac_config
- Remove rmii/mii properties
- Replace 1000Base... with 1000BASE... to match IEEE capitalization
- Add compatibles for QSGMII PCSs
- Split arm and powerpcs dts updates

Changes in v2:
- Better document how we select which PCS to use in the default case
- Move PCS_LYNX dependency to fman Kconfig
- Remove unused variable slow_10g_if
- Restrict valid link modes based on the phy interface. This is easier
  to set up, and mostly captures what I intended to do the first time.
  We now have a custom validate which restricts half-duplex for some SoCs
  for RGMII, but generally just uses the default phylink validate.
- Configure the SerDes in enable/disable
- Properly implement all ethtool ops and ioctls. These were mostly
  stubbed out just enough to compile last time.
- Convert 10GEC and dTSEC as well
- Fix capitalization of mEMAC in commit messages
- Add nodes for QSGMII PCSs
- Add nodes for QSGMII PCSs
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 88a2b3cb 4e748b1b

Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml

+1 −1
Original line number Diff line number Diff line
@@ -74,10 +74,10 @@ properties: 


        properties:

          pcs-handle:

            maxItems: 1

            description:

              phandle pointing to a PCS sub-node compatible with

              renesas,rzn1-miic.yaml#

            $ref: /schemas/types.yaml#/definitions/phandle



unevaluatedProperties: false

Documentation/devicetree/bindings/net/ethernet-controller.yaml

+10 −1
Original line number Diff line number Diff line
@@ -108,11 +108,17 @@ properties: 
    $ref: "#/properties/phy-connection-type"



  pcs-handle:

    $ref: /schemas/types.yaml#/definitions/phandle

    $ref: /schemas/types.yaml#/definitions/phandle-array

    items:

      maxItems: 1

    description:

      Specifies a reference to a node representing a PCS PHY device on a MDIO

      bus to link with an external PHY (phy-handle) if exists.



  pcs-handle-names:

    description:

      The name of each PCS in pcs-handle.



  phy-handle:

    $ref: /schemas/types.yaml#/definitions/phandle

    description:
@@ -216,6 +222,9 @@ properties: 
        required:

          - speed



dependencies:

  pcs-handle-names: [pcs-handle]



allOf:

  - if:

      properties:

Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml

+40 −13
Original line number Diff line number Diff line
@@ -85,9 +85,39 @@ properties: 
    $ref: /schemas/types.yaml#/definitions/phandle

    description: A reference to the IEEE1588 timer



  phys:

    description: A reference to the SerDes lane(s)

    maxItems: 1



  phy-names:

    items:

      - const: serdes



  pcsphy-handle:

    $ref: /schemas/types.yaml#/definitions/phandle

    description: A reference to the PCS (typically found on the SerDes)

    $ref: /schemas/types.yaml#/definitions/phandle-array

    minItems: 1

    maxItems: 3

    deprecated: true

    description: See pcs-handle.



  pcs-handle:

    minItems: 1

    maxItems: 3

    description: |

      A reference to the various PCSs (typically found on the SerDes). If

      pcs-handle-names is absent, and phy-connection-type is "xgmii", then the first

      reference will be assumed to be for "xfi". Otherwise, if pcs-handle-names is

      absent, then the first reference will be assumed to be for "sgmii".



  pcs-handle-names:

    minItems: 1

    maxItems: 3

    items:

      enum:

        - sgmii

        - qsgmii

        - xfi

    description: The type of each PCS in pcsphy-handle.



  tbi-handle:

    $ref: /schemas/types.yaml#/definitions/phandle
@@ -100,6 +130,10 @@ required: 
  - fsl,fman-ports

  - ptp-timer



dependencies:

  pcs-handle-names:

    - pcs-handle



allOf:

  - $ref: ethernet-controller.yaml#

  - if:
@@ -110,14 +144,6 @@ allOf: 
    then:

      required:

        - tbi-handle

  - if:

      properties:

        compatible:

          contains:

            const: fsl,fman-memac

    then:

      required:

        - pcsphy-handle



unevaluatedProperties: false
@@ -138,8 +164,9 @@ examples: 
            reg = <0xe8000 0x1000>;

            fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;

            ptp-timer = <&ptp_timer0>;

            pcsphy-handle = <&pcsphy4>;

            phy-handle = <&sgmii_phy1>;

            phy-connection-type = "sgmii";

            pcs-handle = <&pcsphy4>, <&qsgmiib_pcs1>;

            pcs-handle-names = "sgmii", "qsgmii";

            phys = <&serdes1 1>;

            phy-names = "serdes";

    };

...

Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml

+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ properties: 
  phy-mode: true



  pcs-handle:

    $ref: /schemas/types.yaml#/definitions/phandle

    maxItems: 1

    description:

      A reference to a node representing a PCS PHY device found on

      the internal MDIO bus.

Documentation/devicetree/bindings/net/fsl-fman.txt

+3 −2
Original line number Diff line number Diff line
@@ -320,8 +320,9 @@ For internal PHY device on internal mdio bus, a PHY node should be created. 
See the definition of the PHY node in booting-without-of.txt for an

example of how to define a PHY (Internal PHY has no interrupt line).

- For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.

- For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,

  PCS PHY addr must be '0'.

- For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY.

  The PCS PHY address should correspond to the value of the appropriate

  MDEV_PORT.



EXAMPLE