Commit 88a2b3cb authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'net-marvell-yaml' 

Michał Grzelak says:

====================
net: further improvements to marvell,pp2.yaml

This patchset addresses problems with reg ranges and
additional $refs. It also limits phy-mode and aligns examples.

Best regards,
Michał

---
Changelog:
v4->v5
- drop '+' from all patternProperties
- restrict range of patternProperties to [0-2] in top level
- drop the $ref in patternProperties:'^...':properties:reg
- add patternProperties:'^...':properties:reg:maximum:2
- drop $ref in patternProperties:'^...':properties:phys
- add patternProperties:'^...':properties:phys:maxItems:1
- limit phy-mode to the subset found in dts files
- reflect the order of subnodes' properties in subnodes' required:
- restrict range of pattern to [0-2] in marvell,armada-7k-pp22 case
- restrict range of pattern to [0-1] in marvell,armada-375-pp2 case
- align to 4 spaces all examples:
- add specified maximum to allOf:if:then-else:properties:reg

v3->v4
- change commit message of first patch
- move allOf:$ref to patternProperties:'^...':$ref
- deprecate port-id in favour of reg
- move reg to front of properties list in patternProperties
- reflect the order of properties in required list in
  patternProperties
- add unevaluatedProperties: false to patternProperties
- change unevaluated- to additionalProperties at top level
- add property phys: to ports subnode
- extend example binding with additional information about phys and sfp
- hook phys property to phy-consumer.yaml schema

v2->v3
- move 'reg:description' to 'allOf:if:then'
- change '#size-cells: true' and '#address-cells: true'
  to '#size-cells: const: 0' and '#address-cells: const: 1'
- replace all occurences of pattern "^eth\{hex_num}*"
  with "^(ethernet-)?port@[0-9]+$"
- add description in 'patternProperties:^...'
- add 'patternProperties:^...:interrupt-names:minItems: 1'
- add 'patternProperties:^...:reg:description'
- update 'patternProperties:^...:port-id:description'
- add 'patternProperties:^...:required: - reg'
- update '*:description:' to uppercase
- add 'allOf:then:required:marvell,system-controller'
- skip quotation marks from 'allOf:$ref'
- add 'else' schema to match 'allOf:if:then'
- restrict 'clocks' in 'allOf:if:then'
- restrict 'clock-names' in 'allOf:if:then'
- add #address-cells=<1>; #size-cells=<0>; in 'examples:'
- change every "ethX" to "ethernet-port@X" in 'examples:'
- add "reg" and comment in all ports in 'examples:'
- change /ethernet/eth0/phy-mode in examples://Armada-375


  to "rgmii-id"
- replace each cpm_ with cp0_ in 'examples:'
- replace each _syscon0 with _clk0 in 'examples:'
- remove each eth0X label in 'examples:'
- update armada-375.dtsi and armada-cp11x.dtsi to match
  marvell,pp2.yaml

v1->v2
- move 'properties' to the front of the file
- remove blank line after 'properties'
- move 'compatible' to the front of 'properties'
- move 'clocks', 'clock-names' and 'reg' definitions to 'properties'
- substitute all occurences of 'marvell,armada-7k-pp2' with
  'marvell,armada-7k-pp22'
- add properties:#size-cells and properties:#address-cells
- specify list in 'interrupt-names'
- remove blank lines after 'patternProperties'
- remove '^interrupt' and '^#.*-cells$' patterns
- remove blank line after 'allOf'
- remove first 'if-then-else' block from 'allOf'
- negate the condition in allOf:if schema
- delete 'interrupt-controller' from section 'examples'
- delete '#interrupt-cells' from section 'examples'
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents e2ac2a00 844e4498

Documentation/devicetree/bindings/net/marvell,pp2.yaml

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+305 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/net/marvell,pp2.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Marvell CN913X / Marvell Armada 375, 7K, 8K Ethernet Controller



maintainers:

  - Marcin Wojtas <mw@semihalf.com>

  - Russell King <linux@armlinux.org>



description: |

  Marvell Armada 375 Ethernet Controller (PPv2.1)

  Marvell Armada 7K/8K Ethernet Controller (PPv2.2)

  Marvell CN913X Ethernet Controller (PPv2.3)



properties:

  compatible:

    enum:

      - marvell,armada-375-pp2

      - marvell,armada-7k-pp22



  reg:

    minItems: 3

    maxItems: 4



  "#address-cells":

    const: 1



  "#size-cells":

    const: 0



  clocks:

    minItems: 2

    items:

      - description: main controller clock

      - description: GOP clock

      - description: MG clock

      - description: MG Core clock

      - description: AXI clock



  clock-names:

    minItems: 2

    items:

      - const: pp_clk

      - const: gop_clk

      - const: mg_clk

      - const: mg_core_clk

      - const: axi_clk



  dma-coherent: true



  marvell,system-controller:

    $ref: /schemas/types.yaml#/definitions/phandle

    description: a phandle to the system controller.



patternProperties:

  '^(ethernet-)?port@[0-2]$':

    type: object

    description: subnode for each ethernet port.

    $ref: ethernet-controller.yaml#

    unevaluatedProperties: false



    properties:

      reg:

        description: ID of the port from the MAC point of view.

        maximum: 2



      interrupts:

        minItems: 1

        maxItems: 10

        description: interrupt(s) for the port



      interrupt-names:

        minItems: 1

        items:

          - const: hif0

          - const: hif1

          - const: hif2

          - const: hif3

          - const: hif4

          - const: hif5

          - const: hif6

          - const: hif7

          - const: hif8

          - const: link



        description: >

          if more than a single interrupt for is given, must be the

          name associated to the interrupts listed. Valid names are:

          "hifX", with X in [0..8], and "link". The names "tx-cpu0",

          "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported

          for backward compatibility but shouldn't be used for new

          additions.



      phys:

        minItems: 1

        maxItems: 2

        description: >

          Generic PHY, providing SerDes connectivity. For most modes,

          one lane is sufficient, but some (e.g. RXAUI) may require two.



      phy-mode:

        enum:

          - gmii

          - sgmii

          - rgmii-id

          - 1000base-x

          - 2500base-x

          - 5gbase-r

          - rxaui

          - 10gbase-r



      port-id:

        $ref: /schemas/types.yaml#/definitions/uint32

        deprecated: true

        description: >

          ID of the port from the MAC point of view.

          Legacy binding for backward compatibility.



      marvell,loopback:

        $ref: /schemas/types.yaml#/definitions/flag

        description: port is loopback mode.



      gop-port-id:

        $ref: /schemas/types.yaml#/definitions/uint32

        description: >

          only for marvell,armada-7k-pp22, ID of the port from the

          GOP (Group Of Ports) point of view. This ID is used to index the

          per-port registers in the second register area.



    required:

      - reg

      - interrupts

      - phy-mode

      - port-id



required:

  - compatible

  - reg

  - clocks

  - clock-names



allOf:

  - if:

      properties:

        compatible:

          const: marvell,armada-7k-pp22

    then:

      properties:

        reg:

          items:

            - description: Packet Processor registers

            - description: Networking interfaces registers

            - description: CM3 address space used for TX Flow Control



        clocks:

          minItems: 5



        clock-names:

          minItems: 5



      patternProperties:

        '^(ethernet-)?port@[0-2]$':

          required:

            - gop-port-id



      required:

        - marvell,system-controller

    else:

      properties:

        reg:

          items:

            - description: Packet Processor registers

            - description: LMS registers

            - description: Register area per eth0

            - description: Register area per eth1



        clocks:

          maxItems: 2



        clock-names:

          maxItems: 2



      patternProperties:

        '^(ethernet-)?port@[0-1]$':

          properties:

            reg:

              maximum: 1



            gop-port-id: false



additionalProperties: false



examples:

  - |

    // For Armada 375 variant

    #include <dt-bindings/interrupt-controller/mvebu-icu.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    ethernet@f0000 {

        #address-cells = <1>;

        #size-cells = <0>;

        compatible = "marvell,armada-375-pp2";

        reg = <0xf0000 0xa000>,

              <0xc0000 0x3060>,

              <0xc4000 0x100>,

              <0xc5000 0x100>;

        clocks = <&gateclk 3>, <&gateclk 19>;

        clock-names = "pp_clk", "gop_clk";



        ethernet-port@0 {

            interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

            reg = <0>;

            port-id = <0>; /* For backward compatibility. */

            phy = <&phy0>;

            phy-mode = "rgmii-id";

        };



        ethernet-port@1 {

            interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;

            reg = <1>;

            port-id = <1>; /* For backward compatibility. */

            phy = <&phy3>;

            phy-mode = "gmii";

        };

    };



  - |

    // For Armada 7k/8k and Cn913x variants

    #include <dt-bindings/interrupt-controller/mvebu-icu.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    ethernet@0 {

        #address-cells = <1>;

        #size-cells = <0>;

        compatible = "marvell,armada-7k-pp22";

        reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;

        clocks = <&cp0_clk 1 3>, <&cp0_clk 1 9>,

                 <&cp0_clk 1 5>, <&cp0_clk 1 6>, <&cp0_clk 1 18>;

        clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";

        marvell,system-controller = <&cp0_syscon0>;



        ethernet-port@0 {

            interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 59 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 63 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 67 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 71 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 129 IRQ_TYPE_LEVEL_HIGH>;

            interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",

                              "hif5", "hif6", "hif7", "hif8", "link";

            phy-mode = "10gbase-r";

            phys = <&cp0_comphy4 0>;

            reg = <0>;

            port-id = <0>; /* For backward compatibility. */

            gop-port-id = <0>;

        };



        ethernet-port@1 {

            interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 60 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 64 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 68 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 72 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 128 IRQ_TYPE_LEVEL_HIGH>;

            interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",

                              "hif5", "hif6", "hif7", "hif8", "link";

            phy-mode = "rgmii-id";

            reg = <1>;

            port-id = <1>; /* For backward compatibility. */

            gop-port-id = <2>;

        };



        ethernet-port@2 {

            interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 61 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 65 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 69 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 73 IRQ_TYPE_LEVEL_HIGH>,

                         <ICU_GRP_NSR 127 IRQ_TYPE_LEVEL_HIGH>;

            interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",

                              "hif5", "hif6", "hif7", "hif8", "link";

            phy-mode = "2500base-x";

            managed = "in-band-status";

            phys = <&cp0_comphy5 2>;

            sfp = <&sfp_eth3>;

            reg = <2>;

            port-id = <2>; /* For backward compatibility. */

            gop-port-id = <3>;

        };

    };

Documentation/devicetree/bindings/net/marvell-pp2.txt

deleted100644 → 0
+0 −141
Original line number Diff line number Diff line 
* Marvell Armada 375 Ethernet Controller (PPv2.1)

  Marvell Armada 7K/8K Ethernet Controller (PPv2.2)

  Marvell CN913X Ethernet Controller (PPv2.3)



Required properties:



- compatible: should be one of:

    "marvell,armada-375-pp2"

    "marvell,armada-7k-pp2"

- reg: addresses and length of the register sets for the device.

  For "marvell,armada-375-pp2", must contain the following register

  sets:

	- common controller registers

	- LMS registers

	- one register area per Ethernet port

  For "marvell,armada-7k-pp2" used by 7K/8K and CN913X, must contain the following register

  sets:

	- packet processor registers

	- networking interfaces registers

	- CM3 address space used for TX Flow Control



- clocks: pointers to the reference clocks for this device, consequently:

	- main controller clock (for both armada-375-pp2 and armada-7k-pp2)

	- GOP clock (for both armada-375-pp2 and armada-7k-pp2)

	- MG clock (only for armada-7k-pp2)

	- MG Core clock (only for armada-7k-pp2)

	- AXI clock (only for armada-7k-pp2)

- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk",

  "mg_core_clk" and "axi_clk" (the 3 latter only for armada-7k-pp2).



The ethernet ports are represented by subnodes. At least one port is

required.



Required properties (port):



- interrupts: interrupt(s) for the port

- port-id: ID of the port from the MAC point of view

- gop-port-id: only for marvell,armada-7k-pp2, ID of the port from the

  GOP (Group Of Ports) point of view. This ID is used to index the

  per-port registers in the second register area.

- phy-mode: See ethernet.txt file in the same directory



Optional properties (port):



- marvell,loopback: port is loopback mode

- phy: a phandle to a phy node defining the PHY address (as the reg

  property, a single integer).

- interrupt-names: if more than a single interrupt for is given, must be the

                   name associated to the interrupts listed. Valid names are:

                   "hifX", with X in [0..8], and "link". The names "tx-cpu0",

                   "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported

                   for backward compatibility but shouldn't be used for new

                   additions.

- marvell,system-controller: a phandle to the system controller.



Example for marvell,armada-375-pp2:



ethernet@f0000 {

	compatible = "marvell,armada-375-pp2";

	reg = <0xf0000 0xa000>,

	      <0xc0000 0x3060>,

	      <0xc4000 0x100>,

	      <0xc5000 0x100>;

	clocks = <&gateclk 3>, <&gateclk 19>;

	clock-names = "pp_clk", "gop_clk";



	eth0: eth0@c4000 {

		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

		port-id = <0>;

		phy = <&phy0>;

		phy-mode = "gmii";

	};



	eth1: eth1@c5000 {

		interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;

		port-id = <1>;

		phy = <&phy3>;

		phy-mode = "gmii";

	};

};



Example for marvell,armada-7k-pp2:



cpm_ethernet: ethernet@0 {

	compatible = "marvell,armada-7k-pp22";

	reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;

	clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>,

		 <&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>;

	clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";



	eth0: eth0 {

		interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 59 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 63 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 67 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 71 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 129 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",

				  "hif5", "hif6", "hif7", "hif8", "link";

		port-id = <0>;

		gop-port-id = <0>;

	};



	eth1: eth1 {

		interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 60 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 64 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 68 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 72 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 128 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",

				  "hif5", "hif6", "hif7", "hif8", "link";

		port-id = <1>;

		gop-port-id = <2>;

	};



	eth2: eth2 {

		interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 61 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 65 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 69 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 73 IRQ_TYPE_LEVEL_HIGH>,

			     <ICU_GRP_NSR 127 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",

				  "hif5", "hif6", "hif7", "hif8", "link";

		port-id = <2>;

		gop-port-id = <3>;

	};

};

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -12307,7 +12307,7 @@ M: Marcin Wojtas <mw@semihalf.com> 
M:	Russell King <linux@armlinux.org.uk>

L:	netdev@vger.kernel.org

S:	Maintained

F:	Documentation/devicetree/bindings/net/marvell-pp2.txt

F:	Documentation/devicetree/bindings/net/marvell,pp2.yaml

F:	drivers/net/ethernet/marvell/mvpp2/









MARVELL MWIFIEX WIRELESS DRIVER
































arch/arm/boot/dts/armada-375.dtsi



+8
−4






























Original line number
Diff line number
Diff line







@@ -178,6 +178,8 @@

















			/* Network controller */









			ethernet: ethernet@f0000 {









				#address-cells = <1>;









				#size-cells = <0>;









				compatible = "marvell,armada-375-pp2";









				reg = <0xf0000 0xa000>, /* Packet Processor regs */









				      <0xc0000 0x3060>, /* LMS regs */








@@ -187,15 +189,17 @@







				clock-names = "pp_clk", "gop_clk";









				status = "disabled";



















				eth0: eth0 {









				eth0: ethernet-port@0 {









					interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;









					port-id = <0>;









					reg = <0>;









					port-id = <0>; /* For backward compatibility. */









					status = "disabled";









				};



















				eth1: eth1 {









				eth1: ethernet-port@1 {









					interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;









					port-id = <1>;









					reg = <1>;









					port-id = <1>; /* For backward compatibility. */









					status = "disabled";









				};









			};
































arch/arm64/boot/dts/marvell/armada-cp11x.dtsi



+11
−6






























Original line number
Diff line number
Diff line







@@ -58,6 +58,8 @@







		ranges = <0x0 0x0 ADDRESSIFY(CP11X_BASE) 0x2000000>;



















		CP11X_LABEL(ethernet): ethernet@0 {









			#address-cells = <1>;









			#size-cells = <0>;









			compatible = "marvell,armada-7k-pp22";









			reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;









			clocks = <&CP11X_LABEL(clk) 1 3>, <&CP11X_LABEL(clk) 1 9>,








@@ -69,7 +71,7 @@







			status = "disabled";









			dma-coherent;



















			CP11X_LABEL(eth0): eth0 {









			CP11X_LABEL(eth0): ethernet-port@0 {









				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>,









					<43 IRQ_TYPE_LEVEL_HIGH>,









					<47 IRQ_TYPE_LEVEL_HIGH>,








@@ -83,12 +85,13 @@







				interrupt-names = "hif0", "hif1", "hif2",









					"hif3", "hif4", "hif5", "hif6", "hif7",









					"hif8", "link";









				port-id = <0>;









				reg = <0>;









				port-id = <0>; /* For backward compatibility. */









				gop-port-id = <0>;









				status = "disabled";









			};



















			CP11X_LABEL(eth1): eth1 {









			CP11X_LABEL(eth1): ethernet-port@1 {









				interrupts = <40 IRQ_TYPE_LEVEL_HIGH>,









					<44 IRQ_TYPE_LEVEL_HIGH>,









					<48 IRQ_TYPE_LEVEL_HIGH>,








@@ -102,12 +105,13 @@







				interrupt-names = "hif0", "hif1", "hif2",









					"hif3", "hif4", "hif5", "hif6", "hif7",









					"hif8", "link";









				port-id = <1>;









				reg = <1>;









				port-id = <1>; /* For backward compatibility. */









				gop-port-id = <2>;









				status = "disabled";









			};



















			CP11X_LABEL(eth2): eth2 {









			CP11X_LABEL(eth2): ethernet-port@2 {









				interrupts = <41 IRQ_TYPE_LEVEL_HIGH>,









					<45 IRQ_TYPE_LEVEL_HIGH>,









					<49 IRQ_TYPE_LEVEL_HIGH>,








@@ -121,7 +125,8 @@







				interrupt-names = "hif0", "hif1", "hif2",









					"hif3", "hif4", "hif5", "hif6", "hif7",









					"hif8", "link";









				port-id = <2>;









				reg = <2>;









				port-id = <2>; /* For backward compatibility. */









				gop-port-id = <3>;









				status = "disabled";









			};