Commit 5be86f68 authored by Linus Walleij's avatar Linus Walleij
Browse files

ARM: ixp4xx: Delete the Arcom Vulcan boardfiles 



This board is replaced with the corresponding device tree.

Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 73907f98

arch/arm/mach-ixp4xx/Kconfig

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Original line number Diff line number Diff line
@@ -116,14 +116,6 @@ config MACH_FSG 
	  FSG-3 device. For more information on this platform,

	  see http://www.nslu2-linux.org/wiki/FSG3/HomePage



config MACH_ARCOM_VULCAN

	bool

	prompt "Arcom/Eurotech Vulcan"

	depends on IXP4XX_PCI_LEGACY

	help

	  Say 'Y' here if you want your kernel to support Arcom's

	  Vulcan board.



#

# Certain registers and IRQs are only enabled if supporting IXP465 CPUs

#

arch/arm/mach-ixp4xx/Makefile

+0 −2
Original line number Diff line number Diff line
@@ -16,7 +16,6 @@ obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o 
obj-pci-$(CONFIG_MACH_GTWX5715)		+= gtwx5715-pci.o

obj-pci-$(CONFIG_MACH_GATEWAY7001)	+= gateway7001-pci.o

obj-pci-$(CONFIG_MACH_FSG)		+= fsg-pci.o

obj-pci-$(CONFIG_MACH_ARCOM_VULCAN)	+= vulcan-pci.o



obj-y	+= common.o
@@ -28,6 +27,5 @@ obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o 
obj-$(CONFIG_MACH_GATEWAY7001)	+= gateway7001-setup.o

obj-$(CONFIG_MACH_FSG)		+= fsg-setup.o

obj-$(CONFIG_MACH_GORAMO_MLR)	+= goramo_mlr.o

obj-$(CONFIG_MACH_ARCOM_VULCAN)	+= vulcan-setup.o



obj-$(CONFIG_PCI)		+= $(obj-pci-$(CONFIG_PCI)) common-pci.o

arch/arm/mach-ixp4xx/vulcan-pci.c

deleted100644 → 0
+0 −70
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * arch/arch/mach-ixp4xx/vulcan-pci.c

 *

 * Vulcan board-level PCI initialization

 *

 * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>

 *

 * based on ixdp425-pci.c:

 *	Copyright (C) 2002 Intel Corporation.

 *	Copyright (C) 2003-2004 MontaVista Software, Inc.

 */



#include <linux/pci.h>

#include <linux/init.h>

#include <linux/irq.h>

#include <asm/mach/pci.h>

#include <asm/mach-types.h>



#include "irqs.h"



/* PCI controller GPIO to IRQ pin mappings */

#define INTA	2

#define INTB	3



void __init vulcan_pci_preinit(void)

{

#ifndef CONFIG_IXP4XX_INDIRECT_PCI

	/*

	 * Cardbus bridge wants way more than the SoC can actually offer,

	 * and leaves the whole PCI bus in a mess. Artificially limit it

	 * to 8MB per region. Of course indirect mode doesn't have this

	 * limitation...

	 */

	pci_cardbus_mem_size = SZ_8M;

	pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n",

		(int)(pci_cardbus_mem_size >> 20));

#endif

	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);

	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);

	ixp4xx_pci_preinit();

}



static int __init vulcan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)

{

	if (slot == 1)

		return IXP4XX_GPIO_IRQ(INTA);



	if (slot == 2)

		return IXP4XX_GPIO_IRQ(INTB);



	return -1;

}



struct hw_pci vulcan_pci __initdata = {

	.nr_controllers	= 1,

	.ops		= &ixp4xx_ops,

	.preinit	= vulcan_pci_preinit,

	.setup		= ixp4xx_setup,

	.map_irq	= vulcan_map_irq,

};



int __init vulcan_pci_init(void)

{

	if (machine_is_arcom_vulcan())

		pci_common_init(&vulcan_pci);

	return 0;

}



subsys_initcall(vulcan_pci_init);

arch/arm/mach-ixp4xx/vulcan-setup.c

deleted100644 → 0
+0 −282
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * arch/arm/mach-ixp4xx/vulcan-setup.c

 *

 * Arcom/Eurotech Vulcan board-setup

 *

 * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>

 *

 * based on fsg-setup.c:

 *	Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>

 */



#include <linux/if_ether.h>

#include <linux/irq.h>

#include <linux/serial.h>

#include <linux/serial_8250.h>

#include <linux/io.h>

#include <linux/w1-gpio.h>

#include <linux/gpio/machine.h>

#include <linux/mtd/plat-ram.h>

#include <asm/mach-types.h>

#include <asm/mach/arch.h>

#include <asm/mach/flash.h>



#include "irqs.h"



static struct flash_platform_data vulcan_flash_data = {

	.map_name	= "cfi_probe",

	.width		= 2,

};



static struct resource vulcan_flash_resource = {

	.flags			= IORESOURCE_MEM,

};



static struct platform_device vulcan_flash = {

	.name			= "IXP4XX-Flash",

	.id			= 0,

	.dev = {

		.platform_data	= &vulcan_flash_data,

	},

	.resource		= &vulcan_flash_resource,

	.num_resources		= 1,

};



static struct platdata_mtd_ram vulcan_sram_data = {

	.mapname	= "Vulcan SRAM",

	.bankwidth	= 1,

};



static struct resource vulcan_sram_resource = {

	.flags			= IORESOURCE_MEM,

};



static struct platform_device vulcan_sram = {

	.name			= "mtd-ram",

	.id			= 0,

	.dev = {

		.platform_data	= &vulcan_sram_data,

	},

	.resource		= &vulcan_sram_resource,

	.num_resources		= 1,

};



static struct resource vulcan_uart_resources[] = {

	[0] = {

		.start		= IXP4XX_UART1_BASE_PHYS,

		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,

		.flags		= IORESOURCE_MEM,

	},

	[1] = {

		.start		= IXP4XX_UART2_BASE_PHYS,

		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,

		.flags		= IORESOURCE_MEM,

	},

	[2] = {

		.flags		= IORESOURCE_MEM,

	},

};



static struct plat_serial8250_port vulcan_uart_data[] = {

	[0] = {

		.mapbase	= IXP4XX_UART1_BASE_PHYS,

		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,

		.irq		= IRQ_IXP4XX_UART1,

		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,

		.iotype		= UPIO_MEM,

		.regshift	= 2,

		.uartclk	= IXP4XX_UART_XTAL,

	},

	[1] = {

		.mapbase	= IXP4XX_UART2_BASE_PHYS,

		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,

		.irq		= IRQ_IXP4XX_UART2,

		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,

		.iotype		= UPIO_MEM,

		.regshift	= 2,

		.uartclk	= IXP4XX_UART_XTAL,

	},

	[2] = {

		.irq		= IXP4XX_GPIO_IRQ(4),

		.irqflags	= IRQF_TRIGGER_LOW,

		.flags		= UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,

		.iotype		= UPIO_MEM,

		.uartclk	= 1843200,

	},

	[3] = {

		.irq		= IXP4XX_GPIO_IRQ(4),

		.irqflags	= IRQF_TRIGGER_LOW,

		.flags		= UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,

		.iotype		= UPIO_MEM,

		.uartclk	= 1843200,

	},

	{ }

};



static struct platform_device vulcan_uart = {

	.name			= "serial8250",

	.id			= PLAT8250_DEV_PLATFORM,

	.dev = {

		.platform_data	= vulcan_uart_data,

	},

	.resource		= vulcan_uart_resources,

	.num_resources		= ARRAY_SIZE(vulcan_uart_resources),

};



static struct resource vulcan_npeb_resources[] = {

	{

		.start		= IXP4XX_EthB_BASE_PHYS,

		.end		= IXP4XX_EthB_BASE_PHYS + 0x0fff,

		.flags		= IORESOURCE_MEM,

	},

};



static struct resource vulcan_npec_resources[] = {

	{

		.start		= IXP4XX_EthC_BASE_PHYS,

		.end		= IXP4XX_EthC_BASE_PHYS + 0x0fff,

		.flags		= IORESOURCE_MEM,

	},

};



static struct eth_plat_info vulcan_plat_eth[] = {

	[0] = {

		.phy		= 0,

		.rxq		= 3,

		.txreadyq	= 20,

	},

	[1] = {

		.phy		= 1,

		.rxq		= 4,

		.txreadyq	= 21,

	},

};



static struct platform_device vulcan_eth[] = {

	[0] = {

		.name			= "ixp4xx_eth",

		.id			= IXP4XX_ETH_NPEB,

		.dev = {

			.platform_data	= &vulcan_plat_eth[0],

		},

		.num_resources		= ARRAY_SIZE(vulcan_npeb_resources),

		.resource		= vulcan_npeb_resources,

	},

	[1] = {

		.name			= "ixp4xx_eth",

		.id			= IXP4XX_ETH_NPEC,

		.dev = {

			.platform_data	= &vulcan_plat_eth[1],

		},

		.num_resources		= ARRAY_SIZE(vulcan_npec_resources),

		.resource		= vulcan_npec_resources,

	},

};



static struct resource vulcan_max6369_resource = {

	.flags			= IORESOURCE_MEM,

};



static struct platform_device vulcan_max6369 = {

	.name			= "max6369_wdt",

	.id			= -1,

	.resource		= &vulcan_max6369_resource,

	.num_resources		= 1,

};



static struct gpiod_lookup_table vulcan_w1_gpiod_table = {

	.dev_id = "w1-gpio",

	.table = {

		GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", 14, NULL, 0,

				GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),

	},

};



static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {

	/* Intentionally left blank */

};



static struct platform_device vulcan_w1_gpio = {

	.name			= "w1-gpio",

	.id			= 0,

	.dev			= {

		.platform_data	= &vulcan_w1_gpio_pdata,

	},

};



static struct platform_device *vulcan_devices[] __initdata = {

	&vulcan_uart,

	&vulcan_flash,

	&vulcan_sram,

	&vulcan_max6369,

	&vulcan_eth[0],

	&vulcan_eth[1],

	&vulcan_w1_gpio,

};



static void __init vulcan_init(void)

{

	ixp4xx_sys_init();



	/* Flash is spread over both CS0 and CS1 */

	vulcan_flash_resource.start	 = IXP4XX_EXP_BUS_BASE(0);

	vulcan_flash_resource.end	 = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;

	*IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN		|

			  IXP4XX_EXP_BUS_STROBE_T(3)	|

			  IXP4XX_EXP_BUS_SIZE(0xF)	|

			  IXP4XX_EXP_BUS_BYTE_RD16	|

			  IXP4XX_EXP_BUS_WR_EN;

	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;



	/* SRAM on CS2, (256kB, 8bit, writable) */

	vulcan_sram_resource.start	= IXP4XX_EXP_BUS_BASE(2);

	vulcan_sram_resource.end	= IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1;

	*IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN		|

			  IXP4XX_EXP_BUS_STROBE_T(1)	|

			  IXP4XX_EXP_BUS_HOLD_T(2)	|

			  IXP4XX_EXP_BUS_SIZE(9)	|

			  IXP4XX_EXP_BUS_SPLT_EN	|

			  IXP4XX_EXP_BUS_WR_EN		|

			  IXP4XX_EXP_BUS_BYTE_EN;



	/* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */

	vulcan_uart_resources[2].start	= IXP4XX_EXP_BUS_BASE(3);

	vulcan_uart_resources[2].end	= IXP4XX_EXP_BUS_BASE(3) + 16 - 1;

	vulcan_uart_data[2].mapbase	= vulcan_uart_resources[2].start;

	vulcan_uart_data[3].mapbase	= vulcan_uart_data[2].mapbase + 8;

	*IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN		|

			  IXP4XX_EXP_BUS_STROBE_T(3)	|

			  IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)|

			  IXP4XX_EXP_BUS_WR_EN		|

			  IXP4XX_EXP_BUS_BYTE_EN;



	/* GPIOS on CS4 (512 bytes, 8bits, writable) */

	*IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN		|

			  IXP4XX_EXP_BUS_WR_EN		|

			  IXP4XX_EXP_BUS_BYTE_EN;



	/* max6369 on CS5 (512 bytes, 8bits, writable) */

	vulcan_max6369_resource.start	= IXP4XX_EXP_BUS_BASE(5);

	vulcan_max6369_resource.end	= IXP4XX_EXP_BUS_BASE(5);

	*IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN		|

			  IXP4XX_EXP_BUS_WR_EN		|

			  IXP4XX_EXP_BUS_BYTE_EN;



	gpiod_add_lookup_table(&vulcan_w1_gpiod_table);

	platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices));

}



MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")

	/* Maintainer: Marc Zyngier <maz@misterjones.org> */

	.map_io		= ixp4xx_map_io,

	.init_early	= ixp4xx_init_early,

	.init_irq	= ixp4xx_init_irq,

	.init_time	= ixp4xx_timer_init,

	.atag_offset	= 0x100,

	.init_machine	= vulcan_init,

#if defined(CONFIG_PCI)

	.dma_zone_size	= SZ_64M,

#endif

	.restart	= ixp4xx_restart,

MACHINE_END