Commit 5b1c1d52 authored by Hongchen Zhang's avatar Hongchen Zhang
Browse files

Revert "Loongarch: Dynamic enable writecombine" 

LoongArch inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/IB4PPE


CVE: NA

--------------------------------

This reverts commit 1c1c0003.

Fixes: 1c1c0003 ("Loongarch: Dynamic enable writecombine")
Signed-off-by: default avatarHongchen Zhang <zhanghongchen@loongson.cn>
parent 7c547c6b

arch/loongarch/kernel/setup.c

+2 −26
Original line number Diff line number Diff line
@@ -186,14 +186,12 @@ bool wc_enabled = false; 


EXPORT_SYMBOL(wc_enabled);



static int wc_arg = -1;



static int __init setup_writecombine(char *p)

{

	if (!strcmp(p, "on"))

		wc_arg = true;

		wc_enabled = true;

	else if (!strcmp(p, "off"))

		wc_arg = false;

		wc_enabled = false;

	else

		pr_warn("Unknown writecombine setting \"%s\".\n", p);
@@ -375,26 +373,6 @@ static void __init bootcmdline_init(char **cmdline_p) 
	*cmdline_p = boot_command_line;

}



static void __init writecombine_detect(void)

{

	u64 cpuname;



	if (wc_arg >= 0) {

		wc_enabled = wc_arg;

		return;

	}



	cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME);



	switch (cpuname) {

	case 0x0000303030364333:

		wc_enabled = true;

		break;

	default:

		break;

	}

}



void __init platform_init(void)

{

	arch_reserve_vmcore();
@@ -418,8 +396,6 @@ void __init platform_init(void) 
	smbios_parse();

	pr_info("The BIOS Version: %s\n", b_info.bios_version);



	writecombine_detect();

	pr_info("WriteCombine: %s\n", wc_enabled ? "on":"off");

	efi_runtime_init();

}

include/drm/drm_cache.h

+1 −1
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@ static inline bool drm_arch_can_wc_memory(void) 
	 * cache coherency machanism. This means WUC can only used for write-only

	 * memory regions.

	 */

	return wc_enabled;

	return false;

#else

	return true;

#endif