Commit 5a0510d5 authored Apr 28, 2023 by Mario Limonciello Committed by Alex Deucher Jun 09, 2023

drm/amd: Downgrade message about watermarks table after s0i3 to debug



This message shows up on s0i3 resume for DCN31 and DCN314 platforms but
it has been decided that this flow won't be changed and the message is
expected behavior.

Downgrade the message to debug.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 83033f72

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -130,7 +130,7 @@ static int dcn31_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr,
		if (result == VBIOSSMC_Result_Failed) {
		if (msg_id == VBIOSSMC_MSG_TransferTableDram2Smu &&
		param == TABLE_WATERMARKS)
		DC_LOG_WARNING("Watermarks table not configured properly by SMU");
		DC_LOG_DEBUG("Watermarks table not configured properly by SMU");
		else
		ASSERT(0);
		REG_WRITE(MP1_SMN_C2PMSG_91, VBIOSSMC_Result_OK);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -145,7 +145,7 @@ static int dcn314_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr,
		if (result == VBIOSSMC_Result_Failed) {
		if (msg_id == VBIOSSMC_MSG_TransferTableDram2Smu &&
		param == TABLE_WATERMARKS)
		DC_LOG_WARNING("Watermarks table not configured properly by SMU");
		DC_LOG_DEBUG("Watermarks table not configured properly by SMU");
		else if (msg_id == VBIOSSMC_MSG_SetHardMinDcfclkByFreq \|\|
		msg_id == VBIOSSMC_MSG_SetMinDeepSleepDcfclk)
		DC_LOG_WARNING("DCFCLK_DPM is not enabled by BIOS");