Commit 57be2dc8 authored by Kieran Bingham's avatar Kieran Bingham Committed by Geert Uytterhoeven
Browse files

clk: renesas: r8a779a0: Add VSPX clock support 



Add clocks for the VSPX.

Signed-off-by: default avatarKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20201216151931.851547-4-kieran.bingham+renesas@ideasonboard.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent ed447e7d

drivers/clk/renesas/r8a779a0-cpg-mssr.c

+4 −0
Original line number Diff line number Diff line
@@ -192,6 +192,10 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { 
	DEF_MOD("vin37",	829,	R8A779A0_CLK_S1D1),

	DEF_MOD("vspd0",	830,	R8A779A0_CLK_S3D1),

	DEF_MOD("vspd1",	831,	R8A779A0_CLK_S3D1),

	DEF_MOD("vspx0",	1028,	R8A779A0_CLK_S1D1),

	DEF_MOD("vspx1",	1029,	R8A779A0_CLK_S1D1),

	DEF_MOD("vspx2",	1030,	R8A779A0_CLK_S1D1),

	DEF_MOD("vspx3",	1031,	R8A779A0_CLK_S1D1),

};



static spinlock_t cpg_lock;