Commit 553c5a42 authored by Ondrej Jirman's avatar Ondrej Jirman Committed by Heiko Stuebner
Browse files

drm/rockchip: dsi: Fix VOP selection on SoCs that support it 



lcdsel_grf_reg is defined as u32, so "< 0" comaprison is always false,
which breaks VOP selection on eg. RK3399. Compare against 0.

Fixes: f3aaa612 ("drm/rockchip: dsi: add rk3568 support")
Signed-off-by: default avatarOndrej Jirman <megi@xff.cz>
Tested-by: default avatarChris Morgan <macromorgan@hotmail.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20221023160747.607943-1-megi@xff.cz
parent ab78c74c

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

+1 −3
Original line number Diff line number Diff line
@@ -752,7 +752,7 @@ static void dw_mipi_dsi_rockchip_config(struct dw_mipi_dsi_rockchip *dsi) 
static void dw_mipi_dsi_rockchip_set_lcdsel(struct dw_mipi_dsi_rockchip *dsi,

					    int mux)

{

	if (dsi->cdata->lcdsel_grf_reg < 0)

	if (dsi->cdata->lcdsel_grf_reg)

		regmap_write(dsi->grf_regmap, dsi->cdata->lcdsel_grf_reg,

			mux ? dsi->cdata->lcdsel_lit : dsi->cdata->lcdsel_big);

}
@@ -1643,7 +1643,6 @@ static const struct rockchip_dw_dsi_chip_data rk3399_chip_data[] = { 
static const struct rockchip_dw_dsi_chip_data rk3568_chip_data[] = {

	{

		.reg = 0xfe060000,

		.lcdsel_grf_reg = -1,

		.lanecfg1_grf_reg = RK3568_GRF_VO_CON2,

		.lanecfg1 = HIWORD_UPDATE(0, RK3568_DSI0_SKEWCALHS |

					  RK3568_DSI0_FORCETXSTOPMODE |
@@ -1653,7 +1652,6 @@ static const struct rockchip_dw_dsi_chip_data rk3568_chip_data[] = { 
	},

	{

		.reg = 0xfe070000,

		.lcdsel_grf_reg = -1,

		.lanecfg1_grf_reg = RK3568_GRF_VO_CON3,

		.lanecfg1 = HIWORD_UPDATE(0, RK3568_DSI1_SKEWCALHS |

					  RK3568_DSI1_FORCETXSTOPMODE |