Unverified Commit 53632462 authored by Mark Brown's avatar Mark Brown
Browse files

regmap-irq: Cleanups and remove unused 

Merge series from Aidan MacDonald <aidanmacdonald.0x0@gmail.com>:

This is a straightforward patch series, mostly just removing a bunch
of old features that were only used by a handful of drivers.

- 1/4 and 2/4 remove unused, deprecated functionality
- 3/4 makes the behavior of .handle_mask_sync() a bit more consistent
  w.r.t. mask and unmask registers, to aid maintainability.
- 4/4 removes now-unused "inverted mask/unmask" compatibility code.
parents e12ff287 0a3a5687

drivers/base/regmap/regmap-irq.c

+47 −175
Original line number Diff line number Diff line
@@ -30,9 +30,6 @@ struct regmap_irq_chip_data { 
	int irq;

	int wake_count;



	unsigned int mask_base;

	unsigned int unmask_base;



	void *status_reg_buf;

	unsigned int *main_status_buf;

	unsigned int *status_buf;
@@ -113,24 +110,22 @@ static void regmap_irq_sync_unlock(struct irq_data *data) 
	 * suppress pointless writes.

	 */

	for (i = 0; i < d->chip->num_regs; i++) {

		if (d->mask_base) {

		if (d->chip->handle_mask_sync)

			d->chip->handle_mask_sync(i, d->mask_buf_def[i],

						  d->mask_buf[i],

						  d->chip->irq_drv_data);

			else {

				reg = d->get_irq_reg(d, d->mask_base, i);



		if (d->chip->mask_base && !d->chip->handle_mask_sync) {

			reg = d->get_irq_reg(d, d->chip->mask_base, i);

			ret = regmap_update_bits(d->map, reg,

						 d->mask_buf_def[i],

						 d->mask_buf[i]);

			if (ret)

					dev_err(d->map->dev, "Failed to sync masks in %x\n",

						reg);

			}

				dev_err(d->map->dev, "Failed to sync masks in %x\n", reg);

		}



		if (d->unmask_base) {

			reg = d->get_irq_reg(d, d->unmask_base, i);

		if (d->chip->unmask_base && !d->chip->handle_mask_sync) {

			reg = d->get_irq_reg(d, d->chip->unmask_base, i);

			ret = regmap_update_bits(d->map, reg,

					d->mask_buf_def[i], ~d->mask_buf[i]);

			if (ret)
@@ -181,20 +176,6 @@ static void regmap_irq_sync_unlock(struct irq_data *data) 
		}

	}



	/* Don't update the type bits if we're using mask bits for irq type. */

	if (!d->chip->type_in_mask) {

		for (i = 0; i < d->chip->num_type_reg; i++) {

			if (!d->type_buf_def[i])

				continue;

			reg = d->get_irq_reg(d, d->chip->type_base, i);

			ret = regmap_update_bits(d->map, reg,

						 d->type_buf_def[i], d->type_buf[i]);

			if (ret != 0)

				dev_err(d->map->dev, "Failed to sync type in %x\n",

					reg);

		}

	}



	for (i = 0; i < d->chip->num_config_bases; i++) {

		for (j = 0; j < d->chip->num_config_regs; j++) {

			reg = d->get_irq_reg(d, d->chip->config_base[i], j);
@@ -273,36 +254,11 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type) 


	reg = t->type_reg_offset / map->reg_stride;



	if (t->type_reg_mask)

		d->type_buf[reg] &= ~t->type_reg_mask;

	else

		d->type_buf[reg] &= ~(t->type_falling_val |

				      t->type_rising_val |

				      t->type_level_low_val |

				      t->type_level_high_val);

	switch (type) {

	case IRQ_TYPE_EDGE_FALLING:

		d->type_buf[reg] |= t->type_falling_val;

		break;



	case IRQ_TYPE_EDGE_RISING:

		d->type_buf[reg] |= t->type_rising_val;

		break;



	case IRQ_TYPE_EDGE_BOTH:

		d->type_buf[reg] |= (t->type_falling_val |

					t->type_rising_val);

		break;



	case IRQ_TYPE_LEVEL_HIGH:

		d->type_buf[reg] |= t->type_level_high_val;

		break;



	case IRQ_TYPE_LEVEL_LOW:

		d->type_buf[reg] |= t->type_level_low_val;

		break;

	default:

		return -EINVAL;

	if (d->chip->type_in_mask) {

		ret = regmap_irq_set_type_config_simple(&d->type_buf, type,

							irq_data, reg, d->chip->irq_drv_data);

		if (ret)

			return ret;

	}



	if (d->chip->set_type_config) {
@@ -367,15 +323,8 @@ static inline int read_sub_irq_data(struct regmap_irq_chip_data *data, 
			unsigned int offset = subreg->offset[i];

			unsigned int index = offset / map->reg_stride;



			if (chip->not_fixed_stride)

				ret = regmap_read(map,

						chip->status_base + offset,

						&data->status_buf[b]);

			else

				ret = regmap_read(map,

						chip->status_base + offset,

			ret = regmap_read(map, chip->status_base + offset,

					  &data->status_buf[index]);



			if (ret)

				break;

		}
@@ -430,17 +379,7 @@ static irqreturn_t regmap_irq_thread(int irq, void *d) 
		 * sake of simplicity. and add bulk reads only if needed

		 */

		for (i = 0; i < chip->num_main_regs; i++) {

			/*

			 * For not_fixed_stride, don't use ->get_irq_reg().

			 * It would produce an incorrect result.

			 */

			if (data->chip->not_fixed_stride)

				reg = chip->main_status +

					i * map->reg_stride * data->irq_reg_stride;

			else

				reg = data->get_irq_reg(data,

							chip->main_status, i);



			reg = data->get_irq_reg(data, chip->main_status, i);

			ret = regmap_read(map, reg, &data->main_status_buf[i]);

			if (ret) {

				dev_err(map->dev,
@@ -606,20 +545,8 @@ static const struct irq_domain_ops regmap_domain_ops = { 
unsigned int regmap_irq_get_irq_reg_linear(struct regmap_irq_chip_data *data,

					   unsigned int base, int index)

{

	const struct regmap_irq_chip *chip = data->chip;

	struct regmap *map = data->map;



	/*

	 * FIXME: This is for backward compatibility and should be removed

	 * when not_fixed_stride is dropped (it's only used by qcom-pm8008).

	 */

	if (chip->not_fixed_stride && chip->sub_reg_offsets) {

		struct regmap_irq_sub_irq_map *subreg;



		subreg = &chip->sub_reg_offsets[0];

		return base + subreg->offset[0];

	}



	return base + index * map->reg_stride * data->irq_reg_stride;

}

EXPORT_SYMBOL_GPL(regmap_irq_get_irq_reg_linear);
@@ -707,8 +634,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, 
	struct regmap_irq_chip_data *d;

	int i;

	int ret = -ENOMEM;

	int num_type_reg;

	int num_regs;

	u32 reg;



	if (chip->num_regs <= 0)
@@ -717,6 +642,9 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, 
	if (chip->clear_on_unmask && (chip->ack_base || chip->use_ack))

		return -EINVAL;



	if (chip->mask_base && chip->unmask_base && !chip->mask_unmask_non_inverted)

		return -EINVAL;



	for (i = 0; i < chip->num_irqs; i++) {

		if (chip->irqs[i].reg_offset % map->reg_stride)

			return -EINVAL;
@@ -725,17 +653,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, 
			return -EINVAL;

	}



	if (chip->not_fixed_stride) {

		dev_warn(map->dev, "not_fixed_stride is deprecated; use ->get_irq_reg() instead");



		for (i = 0; i < chip->num_regs; i++)

			if (chip->sub_reg_offsets[i].num_regs != 1)

				return -EINVAL;

	}



	if (chip->num_type_reg)

		dev_warn(map->dev, "type registers are deprecated; use config registers instead");



	if (irq_base) {

		irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0);

		if (irq_base < 0) {
@@ -780,21 +697,13 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, 
			goto err_alloc;

	}



	/*

	 * Use num_config_regs if defined, otherwise fall back to num_type_reg

	 * to maintain backward compatibility.

	 */

	num_type_reg = chip->num_config_regs ? chip->num_config_regs

			: chip->num_type_reg;

	num_regs = chip->type_in_mask ? chip->num_regs : num_type_reg;

	if (num_regs) {

		d->type_buf_def = kcalloc(num_regs,

	if (chip->type_in_mask) {

		d->type_buf_def = kcalloc(chip->num_regs,

					  sizeof(*d->type_buf_def), GFP_KERNEL);

		if (!d->type_buf_def)

			goto err_alloc;



		d->type_buf = kcalloc(num_regs, sizeof(*d->type_buf),

				      GFP_KERNEL);

		d->type_buf = kcalloc(chip->num_regs, sizeof(*d->type_buf), GFP_KERNEL);

		if (!d->type_buf)

			goto err_alloc;

	}
@@ -824,28 +733,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, 
	d->chip = chip;

	d->irq_base = irq_base;



	if (chip->mask_base && chip->unmask_base &&

	    !chip->mask_unmask_non_inverted) {

		/*

		 * Chips that specify both mask_base and unmask_base used to

		 * get inverted mask behavior by default, with no way to ask

		 * for the normal, non-inverted behavior. This "inverted by

		 * default" behavior is deprecated, but we have to support it

		 * until existing drivers have been fixed.

		 *

		 * Existing drivers should be updated by swapping mask_base

		 * and unmask_base and setting mask_unmask_non_inverted=true.

		 * New drivers should always set the flag.

		 */

		dev_warn(map->dev, "mask_base and unmask_base are inverted, please fix it");



		d->mask_base = chip->unmask_base;

		d->unmask_base = chip->mask_base;

	} else {

		d->mask_base = chip->mask_base;

		d->unmask_base = chip->unmask_base;

	}



	if (chip->irq_reg_stride)

		d->irq_reg_stride = chip->irq_reg_stride;

	else
@@ -874,16 +761,16 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, 
	for (i = 0; i < chip->num_regs; i++) {

		d->mask_buf[i] = d->mask_buf_def[i];



		if (d->mask_base) {

		if (chip->handle_mask_sync) {

				ret = chip->handle_mask_sync(i,

							     d->mask_buf_def[i],

			ret = chip->handle_mask_sync(i, d->mask_buf_def[i],

						     d->mask_buf[i],

						     chip->irq_drv_data);

			if (ret)

				goto err_alloc;

			} else {

				reg = d->get_irq_reg(d, d->mask_base, i);

		}



		if (chip->mask_base && !chip->handle_mask_sync) {

			reg = d->get_irq_reg(d, chip->mask_base, i);

			ret = regmap_update_bits(d->map, reg,

						 d->mask_buf_def[i],

						 d->mask_buf[i]);
@@ -893,10 +780,9 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, 
				goto err_alloc;

			}

		}

		}



		if (d->unmask_base) {

			reg = d->get_irq_reg(d, d->unmask_base, i);

		if (chip->unmask_base && !chip->handle_mask_sync) {

			reg = d->get_irq_reg(d, chip->unmask_base, i);

			ret = regmap_update_bits(d->map, reg,

					d->mask_buf_def[i], ~d->mask_buf[i]);

			if (ret) {
@@ -970,20 +856,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, 
		}

	}



	if (chip->num_type_reg && !chip->type_in_mask) {

		for (i = 0; i < chip->num_type_reg; ++i) {

			reg = d->get_irq_reg(d, d->chip->type_base, i);



			ret = regmap_read(map, reg, &d->type_buf_def[i]);



			if (ret) {

				dev_err(map->dev, "Failed to get type defaults at 0x%x: %d\n",

					reg, ret);

				goto err_alloc;

			}

		}

	}



	if (irq_base)

		d->domain = irq_domain_create_legacy(fwnode, chip->num_irqs,

						     irq_base, 0,

include/linux/regmap.h

+0 −16
Original line number Diff line number Diff line
@@ -1528,9 +1528,6 @@ struct regmap_irq_chip_data; 
 *		     status_base. Should contain num_regs arrays.

 *		     Can be provided for chips with more complex mapping than

 *		     1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...

 *		     When used with not_fixed_stride, each one-element array

 *		     member contains offset calculated as address from each

 *		     peripheral to first peripheral.

 * @num_main_regs: Number of 'main status' irq registers for chips which have

 *		   main_status set.

 *
@@ -1542,8 +1539,6 @@ struct regmap_irq_chip_data; 
 * @ack_base:    Base ack address. If zero then the chip is clear on read.

 *               Using zero value is possible with @use_ack bit.

 * @wake_base:   Base address for wake enables.  If zero unsupported.

 * @type_base:   Base address for irq type.  If zero unsupported.  Deprecated,

 *		 use @config_base instead.

 * @config_base: Base address for IRQ type config regs. If null unsupported.

 * @irq_reg_stride:  Stride to use for chips where registers are not contiguous.

 * @init_ack_masked: Ack all masked interrupts once during initalization.
@@ -1569,11 +1564,6 @@ struct regmap_irq_chip_data; 
 *                   registers before unmasking interrupts to clear any bits

 *                   set when they were masked.

 * @runtime_pm:  Hold a runtime PM lock on the device when accessing it.

 * @not_fixed_stride: Used when chip peripherals are not laid out with fixed

 *		      stride. Must be used with sub_reg_offsets containing the

 *		      offsets to each peripheral. Deprecated; the same thing

 *		      can be accomplished with a @get_irq_reg callback, without

 *		      the need for a @sub_reg_offsets table.

 * @no_status: No status register: all interrupts assumed generated by device.

 *

 * @num_regs:    Number of registers in each control bank.
@@ -1581,9 +1571,6 @@ struct regmap_irq_chip_data; 
 * @irqs:        Descriptors for individual IRQs.  Interrupt numbers are

 *               assigned based on the index in the array of the interrupt.

 * @num_irqs:    Number of descriptors.

 *

 * @num_type_reg:    Number of type registers. Deprecated, use config registers

 *		     instead.

 * @num_config_bases:	Number of config base registers.

 * @num_config_regs:	Number of config registers for each config base register.

 *
@@ -1621,7 +1608,6 @@ struct regmap_irq_chip { 
	unsigned int unmask_base;

	unsigned int ack_base;

	unsigned int wake_base;

	unsigned int type_base;

	const unsigned int *config_base;

	unsigned int irq_reg_stride;

	unsigned int init_ack_masked:1;
@@ -1634,7 +1620,6 @@ struct regmap_irq_chip { 
	unsigned int type_in_mask:1;

	unsigned int clear_on_unmask:1;

	unsigned int runtime_pm:1;

	unsigned int not_fixed_stride:1;

	unsigned int no_status:1;



	int num_regs;
@@ -1642,7 +1627,6 @@ struct regmap_irq_chip { 
	const struct regmap_irq *irqs;

	int num_irqs;



	int num_type_reg;

	int num_config_bases;

	int num_config_regs;