Commit 50a7c876 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: enable mcbp by default on gfx9

It's required for high priority queues.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2535


Reviewed-and-tested-by: default avatarJiadong Zhu <Jiadong.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 02ff519e
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+5 −0
Original line number Diff line number Diff line
@@ -3678,6 +3678,11 @@ static void amdgpu_device_set_mcbp(struct amdgpu_device *adev)
	if (amdgpu_mcbp == 1)
		adev->gfx.mcbp = true;

	if ((adev->ip_versions[GC_HWIP][0] >= IP_VERSION(9, 0, 0)) &&
	    (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 0, 0)) &&
	    adev->gfx.num_gfx_rings)
		adev->gfx.mcbp = true;

	if (amdgpu_sriov_vf(adev))
		adev->gfx.mcbp = true;

+3 −3
Original line number Diff line number Diff line
@@ -180,7 +180,7 @@ uint amdgpu_dc_feature_mask = 2;
uint amdgpu_dc_debug_mask;
uint amdgpu_dc_visual_confirm;
int amdgpu_async_gfx_ring = 1;
int amdgpu_mcbp;
int amdgpu_mcbp = -1;
int amdgpu_discovery = -1;
int amdgpu_mes;
int amdgpu_mes_kiq;
@@ -634,10 +634,10 @@ module_param_named(async_gfx_ring, amdgpu_async_gfx_ring, int, 0444);

/**
 * DOC: mcbp (int)
 * It is used to enable mid command buffer preemption. (0 = disabled (default), 1 = enabled)
 * It is used to enable mid command buffer preemption. (0 = disabled, 1 = enabled, -1 auto (default))
 */
MODULE_PARM_DESC(mcbp,
	"Enable Mid-command buffer preemption (0 = disabled (default), 1 = enabled)");
	"Enable Mid-command buffer preemption (0 = disabled, 1 = enabled), -1 = auto (default)");
module_param_named(mcbp, amdgpu_mcbp, int, 0444);

/**