irqchip/mbigen: add support for a MBIGEN generating SPIs

hulk inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I8NULW


CVE: N/A

-------------------------------------------------

Now with
50528752 ("irqchip/gic-v3: Add support for Message Based Interrupts as an MSI controller"),
we can support MBIGEN to generate message based SPIs by writing GICD_SETSPIR.

The first 64-pins of each MBIGEN chip is used to generate SPIs, and each
MBIGEN chip has several MBIGEN nodes, every node has 128 pins for generating
LPIs. The total pins are: 64(SPIs) + 128 * node_nr(LPIs). So we can translate
the pin index in a unified way in mbigen_domain_translate().

Add TYPE and VEC registers that used by generating SPIs, the driver can
access them when MBIGEN is used to generate SPIs.

Also Add Config IRQ_MBIGEN_ENABLE_SPIs to control whether to enable SPIs
generation by MBIGEN

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Signed-off-by: Yuntao Liu <liuyuntao12@huawei.com>