perf/x86/amd: Support PERF_SAMPLE_{WEIGHT|WEIGHT_STRUCT}

mainline inclusion
from mainline-v6.1-rc1
commit 6b2ae495
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I601MP


CVE: NA

--------------------------------

IbsDcMissLat indicates the number of clock cycles from when a miss is
detected in the data cache to when the data was delivered to the core.
Similarly, IbsTagToRetCtr provides number of cycles from when the op
was tagged to when the op was retired. Consider these fields for
sample->weight.

Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20220928095805.596-5-ravi.bangoria@amd.com


Signed-off-by: Xie Haocheng <haocheng.xie@amd.com>