Commit 4ec6a2f9 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-cleanup', 'clk-aspeed', 'clk-dt', 'clk-renesas' and... 

Merge branches 'clk-cleanup', 'clk-aspeed', 'clk-dt', 'clk-renesas' and 'clk-skyworks' into clk-next

 - Support for i3c clks on Aspeed ast2600 SoCs
 - Clock driver for Skyworks Si521xx I2C PCIe clock generators

* clk-cleanup:
  clk: microchip: fix potential UAF in auxdev release callback
  clk: sifive: make SiFive clk drivers depend on ARCH_ symbols
  clk: stm32h7: Remove an unused field in struct stm32_fractional_divider
  clk: tegra20: fix gcc-7 constant overflow warning
  clock: milbeaut: use devm_platform_get_and_ioremap_resource()
  clk: Print an info line before disabling unused clocks
  clk: ti: Use of_address_to_resource()
  clk: remove unnecessary (void*) conversions
  clk: at91: clk-sam9x60-pll: fix return value check
  clk: visconti: remove unused visconti_pll_provider::regmap

* clk-aspeed:
  dt-bindings: clock: ast2600: Expand comment on reset definitions
  clk: ast2600: Add comment about combined clock + reset handling
  dt-bindings: clock: ast2600: remove IC36 & I3C7 clock definitions
  clk: ast2600: Add full configs for I3C clocks
  dt-bindings: clock: ast2600: Add top-level I3C clock
  clk: ast2600: allow empty entries in aspeed_g6_gates

* clk-dt:
  clk: mediatek: clk-pllfh: fix missing of_node_put() in fhctl_parse_dt()
  clk: Use of_property_present() for testing DT property presence

* clk-renesas:
  clk: renesas: r8a77980: Add I2C5 clock
  clk: rs9: Add support for 9FGV0441
  clk: rs9: Support device specific dif bit calculation
  dt-bindings: clk: rs9: Add 9FGV0441
  clk: rs9: Check for vendor/device ID
  clk: renesas: Convert to platform remove callback returning void
  clk: renesas: r9a06g032: Improve clock tables
  clk: renesas: r9a06g032: Document structs
  clk: renesas: r9a06g032: Drop unused fields
  clk: renesas: r9a06g032: Improve readability
  clk: renesas: r8a77980: Add Z2 clock
  clk: renesas: r8a77970: Add Z2 clock
  clk: renesas: r8a77995: Fix VIN parent clock
  clk: renesas: r8a77980: Add VIN clocks
  clk: renesas: r8a779g0: Add VIN clocks
  clk: renesas: r8a779g0: Add ISPCS clocks
  clk: renesas: r8a779g0: Add CSI-2 clocks
  clk: renesas: r8a779g0: Add thermal clock
  clk: renesas: r8a779g0: Add Audio clocks
  clk: renesas: cpg-mssr: Update MSSR register range for R-Car V4H

* clk-skyworks:
  clk: si521xx: Clock driver for Skyworks Si521xx I2C PCIe clock generators
  dt-bindings: clk: si521xx: Add Skyworks Si521xx I2C PCIe clock generators
parents eeac8ede 7455b700 ced8a02b f1d97a37 6aa252ae edc12763

Documentation/devicetree/bindings/clock/renesas,9series.yaml

+6 −0
Original line number Diff line number Diff line
@@ -16,6 +16,11 @@ description: | 
  - 9FGV0241:

    0 -- DIF0

    1 -- DIF1

  - 9FGV0441:

    0 -- DIF0

    1 -- DIF1

    2 -- DIF2

    3 -- DIF3



maintainers:

  - Marek Vasut <marex@denx.de>
@@ -24,6 +29,7 @@ properties: 
  compatible:

    enum:

      - renesas,9fgv0241

      - renesas,9fgv0441



  reg:

    description: I2C device address

Documentation/devicetree/bindings/clock/skyworks,si521xx.yaml

0 → 100644
+59 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/skyworks,si521xx.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Skyworks Si521xx I2C PCIe clock generators



description: |

  The Skyworks Si521xx are I2C PCIe clock generators providing

  from 4 to 9 output clocks.



maintainers:

  - Marek Vasut <marex@denx.de>



properties:

  compatible:

    enum:

      - skyworks,si52144

      - skyworks,si52146

      - skyworks,si52147



  reg:

    const: 0x6b



  '#clock-cells':

    const: 1



  clocks:

    items:

      - description: XTal input clock



  skyworks,out-amplitude-microvolt:

    enum: [ 300000, 400000, 500000, 600000, 700000, 800000, 900000, 1000000 ]

    description: Output clock signal amplitude



required:

  - compatible

  - reg

  - clocks

  - '#clock-cells'



additionalProperties: false



examples:

  - |

    i2c {

        #address-cells = <1>;

        #size-cells = <0>;



        clock-generator@6b {

            compatible = "skyworks,si52144";

            reg = <0x6b>;

            #clock-cells = <1>;

            clocks = <&ref25m>;

        };

    };



...

drivers/clk/Kconfig

+9 −0
Original line number Diff line number Diff line
@@ -367,6 +367,15 @@ config COMMON_CLK_RS9_PCIE 
	  This driver supports the Renesas 9-series PCIe clock generator

	  models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ.



config COMMON_CLK_SI521XX

	tristate "Clock driver for SkyWorks Si521xx PCIe clock generators"

	depends on I2C

	depends on OF

	select REGMAP_I2C

	help

	  This driver supports the SkyWorks Si521xx PCIe clock generator

	  models Si52144/Si52146/Si52147.



config COMMON_CLK_VC5

	tristate "Clock driver for IDT VersaClock 5,6 devices"

	depends on I2C

drivers/clk/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -72,6 +72,7 @@ obj-$(CONFIG_COMMON_CLK_TPS68470) += clk-tps68470.o 
obj-$(CONFIG_CLK_TWL6040)		+= clk-twl6040.o

obj-$(CONFIG_ARCH_VT8500)		+= clk-vt8500.o

obj-$(CONFIG_COMMON_CLK_RS9_PCIE)	+= clk-renesas-pcie.o

obj-$(CONFIG_COMMON_CLK_SI521XX)	+= clk-si521xx.o

obj-$(CONFIG_COMMON_CLK_VC5)		+= clk-versaclock5.o

obj-$(CONFIG_COMMON_CLK_VC7)		+= clk-versaclock7.o

obj-$(CONFIG_COMMON_CLK_WM831X)		+= clk-wm831x.o

drivers/clk/at91/clk-sam9x60-pll.c

+1 −1
Original line number Diff line number Diff line
@@ -668,7 +668,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock, 


		ret = sam9x60_frac_pll_compute_mul_frac(&frac->core, FCORE_MIN,

							parent_rate, true);

		if (ret <= 0) {

		if (ret < 0) {

			hw = ERR_PTR(ret);

			goto free;

		}