Commit 4de8fd02 authored by Brian Norris's avatar Brian Norris Committed by Chanwoo Choi
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dt-bindings: devfreq: rk3399_dmc: Fix Hz units

The driver and all downstream device trees [1] are using Hz units, but
the document claims MHz. DRAM frequency for these systems can't possibly
exceed 2^32-1 Hz, so the choice of unit doesn't really matter than much.

Rather than add unnecessary risk in getting the units wrong, let's just
go with the unofficial convention and make the docs match reality.

A sub-1MHz frequency is extremely unlikely, so include a minimum in the
schema, to help catch anybody who might have believed this was MHz.

[1] And notably, also those trying to upstream them:
https://lore.kernel.org/lkml/20210308233858.24741-3-daniel.lezcano@linaro.org/



Signed-off-by: default avatarBrian Norris <briannorris@chromium.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
parent 76d136b5
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+12 −12
Original line number Diff line number Diff line
@@ -115,11 +115,11 @@ properties:

  rockchip,ddr3_odt_dis_freq:
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 1000000  # In case anyone thought this was MHz.
    description:
      When the DRAM type is DDR3, this parameter defines the ODT disable
      frequency in MHz (Mega Hz). When the DDR frequency is less then
      ddr3_odt_dis_freq, the ODT on the DRAM side and controller side are both
      disabled.
      frequency in Hz. When the DDR frequency is less then ddr3_odt_dis_freq,
      the ODT on the DRAM side and controller side are both disabled.

  rockchip,ddr3_drv:
    deprecated: true
@@ -163,11 +163,11 @@ properties:

  rockchip,lpddr3_odt_dis_freq:
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 1000000  # In case anyone thought this was MHz.
    description:
      When the DRAM type is LPDDR3, this parameter defines then ODT disable
      frequency in MHz (Mega Hz). When DDR frequency is less then
      ddr3_odt_dis_freq, the ODT on the DRAM side and controller side are both
      disabled.
      frequency in Hz. When DDR frequency is less then ddr3_odt_dis_freq, the
      ODT on the DRAM side and controller side are both disabled.

  rockchip,lpddr3_drv:
    deprecated: true
@@ -210,11 +210,11 @@ properties:

  rockchip,lpddr4_odt_dis_freq:
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 1000000  # In case anyone thought this was MHz.
    description:
      When the DRAM type is LPDDR4, this parameter defines the ODT disable
      frequency in MHz (Mega Hz). When the DDR frequency is less then
      ddr3_odt_dis_freq, the ODT on the DRAM side and controller side are both
      disabled.
      frequency in Hz. When the DDR frequency is less then ddr3_odt_dis_freq,
      the ODT on the DRAM side and controller side are both disabled.

  rockchip,lpddr4_drv:
    deprecated: true
@@ -300,7 +300,7 @@ examples:
      rockchip,sr_mc_gate_idle = <0x3>;
      rockchip,srpd_lite_idle = <0x4>;
      rockchip,standby_idle = <0x2000>;
      rockchip,ddr3_odt_dis_freq = <333>;
      rockchip,lpddr3_odt_dis_freq = <333>;
      rockchip,lpddr4_odt_dis_freq = <333>;
      rockchip,ddr3_odt_dis_freq = <333000000>;
      rockchip,lpddr3_odt_dis_freq = <333000000>;
      rockchip,lpddr4_odt_dis_freq = <333000000>;
    };