Commit 4b44521c authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Stephen Boyd
Browse files

dt-bindings: clock: fu740-prci: add reset-cells 



The SiFive FU740 Power Reset Clock Interrupt Controller is a reset line
provider so add respective reset-cells property to fix:

  arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml: clock-controller@10000000:
    '#reset-cells' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210920144944.162431-1-krzysztof.kozlowski@canonical.com


Reviewed-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent c64daf36

Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml

+4 −0
Original line number Diff line number Diff line
@@ -42,6 +42,9 @@ properties: 
  "#clock-cells":

    const: 1



  "#reset-cells":

    const: 1



required:

  - compatible

  - reg
@@ -57,4 +60,5 @@ examples: 
      reg = <0x10000000 0x1000>;

      clocks = <&hfclk>, <&rtcclk>;

      #clock-cells = <1>;

      #reset-cells = <1>;

    };