Commit 4ab9ffda authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MMC fixes from Ulf Hansson:
 "MMC core:
   - Fixup VDD/VMMC voltage-range negotiation

  MMC host:
   - sdhci-pci: Fix memory leak by adding a missing pci_dev_put()
   - sdhci-pci-o2micro: Fix card detect by tuning the debounce timeout"

* tag 'mmc-v6.1-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
  mmc: sdhci-pci: Fix possible memory leak caused by missing pci_dev_put()
  mmc: sdhci-pci-o2micro: fix card detect fail issue caused by CD# debounce timeout
  mmc: core: properly select voltage range without power cycle
parents 84368d88 222cfa01
Loading
Loading
Loading
Loading
+7 −1
Original line number Diff line number Diff line
@@ -1134,7 +1134,13 @@ u32 mmc_select_voltage(struct mmc_host *host, u32 ocr)
		mmc_power_cycle(host, ocr);
	} else {
		bit = fls(ocr) - 1;
		ocr &= 3 << bit;
		/*
		 * The bit variable represents the highest voltage bit set in
		 * the OCR register.
		 * To keep a range of 2 values (e.g. 3.2V/3.3V and 3.3V/3.4V),
		 * we must shift the mask '3' with (bit - 1).
		 */
		ocr &= 3 << (bit - 1);
		if (bit != host->ios.vdd)
			dev_warn(mmc_dev(host), "exceeding card's volts\n");
	}
+2 −0
Original line number Diff line number Diff line
@@ -1749,6 +1749,8 @@ static int amd_probe(struct sdhci_pci_chip *chip)
		}
	}

	pci_dev_put(smbus_dev);

	if (gen == AMD_CHIPSET_BEFORE_ML || gen == AMD_CHIPSET_CZ)
		chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;

+7 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@
#define O2_SD_CAPS		0xE0
#define O2_SD_ADMA1		0xE2
#define O2_SD_ADMA2		0xE7
#define O2_SD_MISC_CTRL2	0xF0
#define O2_SD_INF_MOD		0xF1
#define O2_SD_MISC_CTRL4	0xFC
#define O2_SD_MISC_CTRL		0x1C0
@@ -877,6 +878,12 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
		/* Set Tuning Windows to 5 */
		pci_write_config_byte(chip->pdev,
				O2_SD_TUNING_CTRL, 0x55);
		//Adjust 1st and 2nd CD debounce time
		pci_read_config_dword(chip->pdev, O2_SD_MISC_CTRL2, &scratch_32);
		scratch_32 &= 0xFFE7FFFF;
		scratch_32 |= 0x00180000;
		pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL2, scratch_32);
		pci_write_config_dword(chip->pdev, O2_SD_DETECT_SETTING, 1);
		/* Lock WP */
		ret = pci_read_config_byte(chip->pdev,
					   O2_SD_LOCK_WP, &scratch);