Commit 4a9a1a56 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Dinh Nguyen
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arm64: socfpga: merge Agilex and N5X into ARCH_INTEL_SOCFPGA



Agilex, N5X and Stratix 10 share all quite similar arm64 hard cores and
SoC-part.  Up to a point that N5X uses the same DTSI as Agilex.  From
the Linux kernel point of view these are flavors of the same
architecture so there is no need for three top-level arm64
architectures.  Simplify this by merging all three architectures into
ARCH_INTEL_SOCFPGA and dropping the other ARCH* arm64 Kconfig entries.

The side effect is that the INTEL_STRATIX10_SERVICE will now be
available for both 32-bit and 64-bit Intel SoCFPGA, even though it is
used only for 64-bit.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent 098da961
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+4 −17
Original line number Diff line number Diff line
@@ -8,16 +8,6 @@ config ARCH_ACTIONS
	help
	  This enables support for the Actions Semiconductor S900 SoC family.

config ARCH_AGILEX
	bool "Intel's Agilex SoCFPGA Family"
	help
	  This enables support for Intel's Agilex SoCFPGA Family.

config ARCH_N5X
	bool "Intel's eASIC N5X SoCFPGA Family"
	help
	  This enables support for Intel's eASIC N5X SoCFPGA Family.

config ARCH_SUNXI
	bool "Allwinner sunxi 64-bit SoC Family"
	select ARCH_HAS_RESET_CONTROLLER
@@ -254,14 +244,11 @@ config ARCH_SEATTLE
	help
	  This enables support for AMD Seattle SOC Family

config ARCH_STRATIX10
	bool "Altera's Stratix 10 SoCFPGA Family"
	select ARCH_INTEL_SOCFPGA
	help
	  This enables support for Altera's Stratix 10 SoCFPGA Family.

config ARCH_INTEL_SOCFPGA
	bool
	bool "Intel's SoCFPGA ARMv8 Families"
	help
	  This enables support for Intel's SoCFPGA ARMv8 families:
	  Stratix 10 (ex. Altera), Agilex and eASIC N5X.

config ARCH_SYNQUACER
	bool "Socionext SynQuacer SoC Family"
+3 −3
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0-only
dtb-$(CONFIG_ARCH_AGILEX) += socfpga_agilex_socdk.dtb \
			     socfpga_agilex_socdk_nand.dtb
dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_socdk.dtb \
				socfpga_agilex_socdk_nand.dtb \
				socfpga_n5x_socdk.dtb
dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb
dtb-$(CONFIG_ARCH_N5X) += socfpga_n5x_socdk.dtb
+1 −1
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ CONFIG_ARCH_RENESAS=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_ARCH_S32=y
CONFIG_ARCH_SEATTLE=y
CONFIG_ARCH_STRATIX10=y
CONFIG_ARCH_INTEL_SOCFPGA=y
CONFIG_ARCH_SYNQUACER=y
CONFIG_ARCH_TEGRA=y
CONFIG_ARCH_SPRD=y
+0 −2
Original line number Diff line number Diff line
@@ -105,8 +105,6 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_COMMON_CLK_SAMSUNG)	+= samsung/
obj-$(CONFIG_CLK_SIFIVE)		+= sifive/
obj-$(CONFIG_ARCH_INTEL_SOCFPGA)	+= socfpga/
obj-$(CONFIG_ARCH_AGILEX)		+= socfpga/
obj-$(CONFIG_ARCH_N5X)			+= socfpga/
obj-$(CONFIG_PLAT_SPEAR)		+= spear/
obj-y					+= sprd/
obj-$(CONFIG_ARCH_STI)			+= st/
+2 −2
Original line number Diff line number Diff line
@@ -2,5 +2,5 @@
config CLK_INTEL_SOCFPGA64
	bool
	# Intel Stratix / Agilex / N5X clock controller support
	default (ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10)
	depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10
	default ARM64 && ARCH_INTEL_SOCFPGA
	depends on ARM64 && ARCH_INTEL_SOCFPGA
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