Commit 098da961 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Dinh Nguyen
Browse files

EDAC: altera: merge ARCH_SOCFPGA and ARCH_STRATIX10 



Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only
one for both of them.  This the common practice for other platforms.
Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come
from multiple vendors.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent 2011431b

drivers/edac/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -396,7 +396,7 @@ config EDAC_THUNDERX 


config EDAC_ALTERA

	bool "Altera SOCFPGA ECC"

	depends on EDAC=y && (ARCH_SOCFPGA || ARCH_STRATIX10)

	depends on EDAC=y && ARCH_INTEL_SOCFPGA

	help

	  Support for error detection and correction on the

	  Altera SOCs. This is the global enable for the

drivers/edac/altera_edac.c

+11 −6
Original line number Diff line number Diff line
@@ -1501,8 +1501,13 @@ static int altr_portb_setup(struct altr_edac_device_dev *device) 
	dci->mod_name = ecc_name;

	dci->dev_name = ecc_name;



	/* Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly */

#ifdef CONFIG_ARCH_STRATIX10

	/*

	 * Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly

	 *

	 * FIXME: Instead of ifdefs with different architectures the driver

	 *        should properly use compatibles.

	 */

#ifdef CONFIG_64BIT

	altdev->sb_irq = irq_of_parse_and_map(np, 1);

#else

	altdev->sb_irq = irq_of_parse_and_map(np, 2);
@@ -1521,7 +1526,7 @@ static int altr_portb_setup(struct altr_edac_device_dev *device) 
		goto err_release_group_1;

	}



#ifdef CONFIG_ARCH_STRATIX10

#ifdef CONFIG_64BIT

	/* Use IRQ to determine SError origin instead of assigning IRQ */

	rc = of_property_read_u32_index(np, "interrupts", 1, &altdev->db_irq);

	if (rc) {
@@ -1931,7 +1936,7 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac, 
		goto err_release_group1;

	}



#ifdef CONFIG_ARCH_STRATIX10

#ifdef CONFIG_64BIT

	/* Use IRQ to determine SError origin instead of assigning IRQ */

	rc = of_property_read_u32_index(np, "interrupts", 0, &altdev->db_irq);

	if (rc) {
@@ -2016,7 +2021,7 @@ static const struct irq_domain_ops a10_eccmgr_ic_ops = { 
/************** Stratix 10 EDAC Double Bit Error Handler ************/

#define to_a10edac(p, m) container_of(p, struct altr_arria10_edac, m)



#ifdef CONFIG_ARCH_STRATIX10

#ifdef CONFIG_64BIT

/* panic routine issues reboot on non-zero panic_timeout */

extern int panic_timeout;
@@ -2109,7 +2114,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev) 
					 altr_edac_a10_irq_handler,

					 edac);



#ifdef CONFIG_ARCH_STRATIX10

#ifdef CONFIG_64BIT

	{

		int dberror, err_addr;