Unverified Commit 47f05757 authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Palmer Dabbelt
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RISC-V: add helpers for handling immediates in U-type and I-type pairs 



Used together U-type and I-type instructions can for example be used to
generate bigger jumps (i.e. in auipc+jalr pairs) by splitting the value
into an upper immediate (i.e. auipc) and a 12bit immediate (i.e. jalr).

Due to both immediates being considered signed this creates some corner
cases, so add some helper to prevent this from getting duplicated in
different places.

Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: default avatarHeiko Stuebner <heiko.stuebner@vrull.eu>
Link: https://lore.kernel.org/r/20221223221332.4127602-12-heiko@sntech.de


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 088ec01f

arch/riscv/include/asm/insn.h

+48 −0
Original line number Diff line number Diff line
@@ -290,3 +290,51 @@ static __always_inline bool riscv_insn_is_branch(u32 code) 
	(RVC_X(x_, RVC_B_IMM_5_OPOFF, RVC_B_IMM_5_MASK) << RVC_B_IMM_5_OFF) | \

	(RVC_X(x_, RVC_B_IMM_7_6_OPOFF, RVC_B_IMM_7_6_MASK) << RVC_B_IMM_7_6_OFF) | \

	(RVC_IMM_SIGN(x_) << RVC_B_IMM_SIGN_OFF); })



/*

 * Put together one immediate from a U-type and I-type instruction pair.

 *

 * The U-type contains an upper immediate, meaning bits[31:12] with [11:0]

 * being zero, while the I-type contains a 12bit immediate.

 * Combined these can encode larger 32bit values and are used for example

 * in auipc + jalr pairs to allow larger jumps.

 *

 * @utype_insn: instruction containing the upper immediate

 * @itype_insn: instruction

 * Return: combined immediate

 */

static inline s32 riscv_insn_extract_utype_itype_imm(u32 utype_insn, u32 itype_insn)

{

	s32 imm;



	imm = RV_EXTRACT_UTYPE_IMM(utype_insn);

	imm += RV_EXTRACT_ITYPE_IMM(itype_insn);



	return imm;

}



/*

 * Update a set of two instructions (U-type + I-type) with an immediate value.

 *

 * Used for example in auipc+jalrs pairs the U-type instructions contains

 * a 20bit upper immediate representing bits[31:12], while the I-type

 * instruction contains a 12bit immediate representing bits[11:0].

 *

 * This also takes into account that both separate immediates are

 * considered as signed values, so if the I-type immediate becomes

 * negative (BIT(11) set) the U-type part gets adjusted.

 *

 * @utype_insn: pointer to the utype instruction of the pair

 * @itype_insn: pointer to the itype instruction of the pair

 * @imm: the immediate to insert into the two instructions

 */

static inline void riscv_insn_insert_utype_itype_imm(u32 *utype_insn, u32 *itype_insn, s32 imm)

{

	/* drop possible old IMM values */

	*utype_insn &= ~(RV_U_IMM_31_12_MASK);

	*itype_insn &= ~(RV_I_IMM_11_0_MASK << RV_I_IMM_11_0_OPOFF);



	/* add the adapted IMMs */

	*utype_insn |= (imm & RV_U_IMM_31_12_MASK) + ((imm & BIT(11)) << 1);

	*itype_insn |= ((imm & RV_I_IMM_11_0_MASK) << RV_I_IMM_11_0_OPOFF);

}