Loading arch/arc/include/asm/cache.h +0 −4 Original line number Diff line number Diff line Loading @@ -62,10 +62,6 @@ #define ARCH_SLAB_MINALIGN 8 #endif extern void arc_cache_init(void); extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); extern void read_decode_cache_bcr(void); extern int ioc_enable; extern unsigned long perip_base, perip_end; Loading arch/arc/include/asm/mmu.h +0 −4 Original line number Diff line number Diff line Loading @@ -64,10 +64,6 @@ typedef struct { unsigned long asid[NR_CPUS]; /* 8 bit MMU PID + Generation cycle */ } mm_context_t; void arc_mmu_init(void); extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); void read_decode_mmu_bcr(void); static inline int is_pae40_enabled(void) { return IS_ENABLED(CONFIG_ARC_HAS_PAE40); Loading arch/arc/include/asm/setup.h +10 −2 Original line number Diff line number Diff line Loading @@ -2,8 +2,8 @@ /* * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) */ #ifndef __ASMARC_SETUP_H #define __ASMARC_SETUP_H #ifndef __ASM_ARC_SETUP_H #define __ASM_ARC_SETUP_H #include <linux/types.h> Loading Loading @@ -34,4 +34,12 @@ long __init arc_get_mem_sz(void); #define IS_AVAIL2(v, s, cfg) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_USED_CFG(cfg)) #define IS_AVAIL3(v, v2, s) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_DISABLED_RUN(v2)) extern void arc_mmu_init(void); extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); extern void read_decode_mmu_bcr(void); extern void arc_cache_init(void); extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); extern void read_decode_cache_bcr(void); #endif /* __ASMARC_SETUP_H */ Loading
arch/arc/include/asm/cache.h +0 −4 Original line number Diff line number Diff line Loading @@ -62,10 +62,6 @@ #define ARCH_SLAB_MINALIGN 8 #endif extern void arc_cache_init(void); extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); extern void read_decode_cache_bcr(void); extern int ioc_enable; extern unsigned long perip_base, perip_end; Loading
arch/arc/include/asm/mmu.h +0 −4 Original line number Diff line number Diff line Loading @@ -64,10 +64,6 @@ typedef struct { unsigned long asid[NR_CPUS]; /* 8 bit MMU PID + Generation cycle */ } mm_context_t; void arc_mmu_init(void); extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); void read_decode_mmu_bcr(void); static inline int is_pae40_enabled(void) { return IS_ENABLED(CONFIG_ARC_HAS_PAE40); Loading
arch/arc/include/asm/setup.h +10 −2 Original line number Diff line number Diff line Loading @@ -2,8 +2,8 @@ /* * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) */ #ifndef __ASMARC_SETUP_H #define __ASMARC_SETUP_H #ifndef __ASM_ARC_SETUP_H #define __ASM_ARC_SETUP_H #include <linux/types.h> Loading Loading @@ -34,4 +34,12 @@ long __init arc_get_mem_sz(void); #define IS_AVAIL2(v, s, cfg) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_USED_CFG(cfg)) #define IS_AVAIL3(v, v2, s) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_DISABLED_RUN(v2)) extern void arc_mmu_init(void); extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); extern void read_decode_mmu_bcr(void); extern void arc_cache_init(void); extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); extern void read_decode_cache_bcr(void); #endif /* __ASMARC_SETUP_H */