Loading arch/arc/Kconfig +0 −3 Original line number Diff line number Diff line Loading @@ -537,9 +537,6 @@ config ARC_DW2_UNWIND If you don't debug the kernel, you can say N, but we may not be able to solve problems without frame unwind information config ARC_DBG_TLB_PARANOIA bool "Paranoia Checks in Low Level TLB Handlers" config ARC_DBG_JUMP_LABEL bool "Paranoid checks in Static Keys (jump labels) code" depends on JUMP_LABEL Loading arch/arc/include/asm/mmu.h +0 −6 Original line number Diff line number Diff line Loading @@ -64,12 +64,6 @@ typedef struct { unsigned long asid[NR_CPUS]; /* 8 bit MMU PID + Generation cycle */ } mm_context_t; #ifdef CONFIG_ARC_DBG_TLB_PARANOIA void tlb_paranoid_check(unsigned int mm_asid, unsigned long address); #else #define tlb_paranoid_check(a, b) #endif void arc_mmu_init(void); extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); void read_decode_mmu_bcr(void); Loading arch/arc/mm/tlb.c +0 −40 Original line number Diff line number Diff line Loading @@ -400,7 +400,6 @@ void create_tlb(struct vm_area_struct *vma, unsigned long vaddr, pte_t *ptep) * * Removing the assumption involves * -Using vma->mm->context{ASID,SASID}, as opposed to MMU reg. * -Fix the TLB paranoid debug code to not trigger false negatives. * -More importantly it makes this handler inconsistent with fast-path * TLB Refill handler which always deals with "current" * Loading @@ -423,8 +422,6 @@ void create_tlb(struct vm_area_struct *vma, unsigned long vaddr, pte_t *ptep) local_irq_save(flags); tlb_paranoid_check(asid_mm(vma->vm_mm, smp_processor_id()), vaddr); vaddr &= PAGE_MASK; /* update this PTE credentials */ Loading Loading @@ -818,40 +815,3 @@ void do_tlb_overlap_fault(unsigned long cause, unsigned long address, local_irq_restore(flags); } /*********************************************************************** * Diagnostic Routines * -Called from Low Level TLB Handlers if things don;t look good **********************************************************************/ #ifdef CONFIG_ARC_DBG_TLB_PARANOIA /* * Low Level ASM TLB handler calls this if it finds that HW and SW ASIDS * don't match */ void print_asid_mismatch(int mm_asid, int mmu_asid, int is_fast_path) { pr_emerg("ASID Mismatch in %s Path Handler: sw-pid=0x%x hw-pid=0x%x\n", is_fast_path ? "Fast" : "Slow", mm_asid, mmu_asid); __asm__ __volatile__("flag 1"); } void tlb_paranoid_check(unsigned int mm_asid, unsigned long addr) { unsigned int mmu_asid; mmu_asid = read_aux_reg(ARC_REG_PID) & 0xff; /* * At the time of a TLB miss/installation * - HW version needs to match SW version * - SW needs to have a valid ASID */ if (addr < 0x70000000 && ((mm_asid == MM_CTXT_NO_ASID) || (mmu_asid != (mm_asid & MM_CTXT_ASID_MASK)))) print_asid_mismatch(mm_asid, mmu_asid, 0); } #endif arch/arc/mm/tlbex.S +0 −50 Original line number Diff line number Diff line Loading @@ -93,11 +93,6 @@ ex_saved_reg1: st_s r1, [r0, 4] st_s r2, [r0, 8] st_s r3, [r0, 12] ; VERIFY if the ASID in MMU-PID Reg is same as ; one in Linux data structures tlb_paranoid_check_asm .endm .macro TLBMISS_RESTORE_REGS Loading Loading @@ -146,51 +141,6 @@ ex_saved_reg1: #endif ;============================================================================ ; Troubleshooting Stuff ;============================================================================ ; Linux keeps ASID (Address Space ID) in task->active_mm->context.asid ; When Creating TLB Entries, instead of doing 3 dependent loads from memory, ; we use the MMU PID Reg to get current ASID. ; In bizzare scenrios SW and HW ASID can get out-of-sync which is trouble. ; So we try to detect this in TLB Mis shandler .macro tlb_paranoid_check_asm #ifdef CONFIG_ARC_DBG_TLB_PARANOIA GET_CURR_TASK_ON_CPU r3 ld r0, [r3, TASK_ACT_MM] ld r0, [r0, MM_CTXT+MM_CTXT_ASID] breq r0, 0, 55f ; Error if no ASID allocated lr r1, [ARC_REG_PID] and r1, r1, 0xFF and r2, r0, 0xFF ; MMU PID bits only for comparison breq r1, r2, 5f 55: ; Error if H/w and S/w ASID don't match, but NOT if in kernel mode lr r2, [erstatus] bbit0 r2, STATUS_U_BIT, 5f ; We sure are in troubled waters, Flag the error, but to do so ; need to switch to kernel mode stack to call error routine GET_TSK_STACK_BASE r3, sp ; Call printk to shoutout aloud mov r2, 1 j print_asid_mismatch 5: ; ASIDs match so proceed normally nop #endif .endm ;============================================================================ ;TLB Miss handling Code ;============================================================================ Loading Loading
arch/arc/Kconfig +0 −3 Original line number Diff line number Diff line Loading @@ -537,9 +537,6 @@ config ARC_DW2_UNWIND If you don't debug the kernel, you can say N, but we may not be able to solve problems without frame unwind information config ARC_DBG_TLB_PARANOIA bool "Paranoia Checks in Low Level TLB Handlers" config ARC_DBG_JUMP_LABEL bool "Paranoid checks in Static Keys (jump labels) code" depends on JUMP_LABEL Loading
arch/arc/include/asm/mmu.h +0 −6 Original line number Diff line number Diff line Loading @@ -64,12 +64,6 @@ typedef struct { unsigned long asid[NR_CPUS]; /* 8 bit MMU PID + Generation cycle */ } mm_context_t; #ifdef CONFIG_ARC_DBG_TLB_PARANOIA void tlb_paranoid_check(unsigned int mm_asid, unsigned long address); #else #define tlb_paranoid_check(a, b) #endif void arc_mmu_init(void); extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); void read_decode_mmu_bcr(void); Loading
arch/arc/mm/tlb.c +0 −40 Original line number Diff line number Diff line Loading @@ -400,7 +400,6 @@ void create_tlb(struct vm_area_struct *vma, unsigned long vaddr, pte_t *ptep) * * Removing the assumption involves * -Using vma->mm->context{ASID,SASID}, as opposed to MMU reg. * -Fix the TLB paranoid debug code to not trigger false negatives. * -More importantly it makes this handler inconsistent with fast-path * TLB Refill handler which always deals with "current" * Loading @@ -423,8 +422,6 @@ void create_tlb(struct vm_area_struct *vma, unsigned long vaddr, pte_t *ptep) local_irq_save(flags); tlb_paranoid_check(asid_mm(vma->vm_mm, smp_processor_id()), vaddr); vaddr &= PAGE_MASK; /* update this PTE credentials */ Loading Loading @@ -818,40 +815,3 @@ void do_tlb_overlap_fault(unsigned long cause, unsigned long address, local_irq_restore(flags); } /*********************************************************************** * Diagnostic Routines * -Called from Low Level TLB Handlers if things don;t look good **********************************************************************/ #ifdef CONFIG_ARC_DBG_TLB_PARANOIA /* * Low Level ASM TLB handler calls this if it finds that HW and SW ASIDS * don't match */ void print_asid_mismatch(int mm_asid, int mmu_asid, int is_fast_path) { pr_emerg("ASID Mismatch in %s Path Handler: sw-pid=0x%x hw-pid=0x%x\n", is_fast_path ? "Fast" : "Slow", mm_asid, mmu_asid); __asm__ __volatile__("flag 1"); } void tlb_paranoid_check(unsigned int mm_asid, unsigned long addr) { unsigned int mmu_asid; mmu_asid = read_aux_reg(ARC_REG_PID) & 0xff; /* * At the time of a TLB miss/installation * - HW version needs to match SW version * - SW needs to have a valid ASID */ if (addr < 0x70000000 && ((mm_asid == MM_CTXT_NO_ASID) || (mmu_asid != (mm_asid & MM_CTXT_ASID_MASK)))) print_asid_mismatch(mm_asid, mmu_asid, 0); } #endif
arch/arc/mm/tlbex.S +0 −50 Original line number Diff line number Diff line Loading @@ -93,11 +93,6 @@ ex_saved_reg1: st_s r1, [r0, 4] st_s r2, [r0, 8] st_s r3, [r0, 12] ; VERIFY if the ASID in MMU-PID Reg is same as ; one in Linux data structures tlb_paranoid_check_asm .endm .macro TLBMISS_RESTORE_REGS Loading Loading @@ -146,51 +141,6 @@ ex_saved_reg1: #endif ;============================================================================ ; Troubleshooting Stuff ;============================================================================ ; Linux keeps ASID (Address Space ID) in task->active_mm->context.asid ; When Creating TLB Entries, instead of doing 3 dependent loads from memory, ; we use the MMU PID Reg to get current ASID. ; In bizzare scenrios SW and HW ASID can get out-of-sync which is trouble. ; So we try to detect this in TLB Mis shandler .macro tlb_paranoid_check_asm #ifdef CONFIG_ARC_DBG_TLB_PARANOIA GET_CURR_TASK_ON_CPU r3 ld r0, [r3, TASK_ACT_MM] ld r0, [r0, MM_CTXT+MM_CTXT_ASID] breq r0, 0, 55f ; Error if no ASID allocated lr r1, [ARC_REG_PID] and r1, r1, 0xFF and r2, r0, 0xFF ; MMU PID bits only for comparison breq r1, r2, 5f 55: ; Error if H/w and S/w ASID don't match, but NOT if in kernel mode lr r2, [erstatus] bbit0 r2, STATUS_U_BIT, 5f ; We sure are in troubled waters, Flag the error, but to do so ; need to switch to kernel mode stack to call error routine GET_TSK_STACK_BASE r3, sp ; Call printk to shoutout aloud mov r2, 1 j print_asid_mismatch 5: ; ASIDs match so proceed normally nop #endif .endm ;============================================================================ ;TLB Miss handling Code ;============================================================================ Loading