Commit 6128df5b authored by Vineet Gupta's avatar Vineet Gupta
Browse files

ARC: mm: use SCRATCH_DATA0 register for caching pgdir in ARCv2 only 



MMU SCRATCH_DATA0 register is intended to cache task pgd. However in
ARC700 SMP port, it has to be repurposed for re-entrant interrupt
handling, while UP port doesn't. We currently handle these use-cases
using a fabricated #define which has usual issues of dependency nesting
and obvious ugliness.

So clean this up: for ARC700 don't use to cache pgd (even in UP) and do
the opposite for ARCv2.

And while here, switch to canonical pgd_offset().

Acked-by: default avatarMike Rapoport <rppt@linux.ibm.com>
Signed-off-by: default avatarVineet Gupta <vgupta@kernel.org>
parent 288ff7de

arch/arc/include/asm/entry-compact.h

+0 −8
Original line number Diff line number Diff line
@@ -126,19 +126,11 @@ 
 * to be saved again on kernel mode stack, as part of pt_regs.

 *-------------------------------------------------------------*/

.macro PROLOG_FREEUP_REG	reg, mem

#ifndef ARC_USE_SCRATCH_REG

	sr  \reg, [ARC_REG_SCRATCH_DATA0]

#else

	st  \reg, [\mem]

#endif

.endm



.macro PROLOG_RESTORE_REG	reg, mem

#ifndef ARC_USE_SCRATCH_REG

	lr  \reg, [ARC_REG_SCRATCH_DATA0]

#else

	ld  \reg, [\mem]

#endif

.endm



/*--------------------------------------------------------------

arch/arc/include/asm/mmu.h

+0 −4
Original line number Diff line number Diff line
@@ -31,10 +31,6 @@ 
#define ARC_REG_SCRATCH_DATA0	0x46c

#endif



#if defined(CONFIG_ISA_ARCV2) || !defined(CONFIG_SMP)

#define	ARC_USE_SCRATCH_REG

#endif



/* Bits in MMU PID register */

#define __TLB_ENABLE		(1 << 31)

#define __PROG_ENABLE		(1 << 30)

arch/arc/include/asm/mmu_context.h

+1 −1
Original line number Diff line number Diff line
@@ -146,7 +146,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, 
	 */

	cpumask_set_cpu(cpu, mm_cpumask(next));



#ifdef ARC_USE_SCRATCH_REG

#ifdef CONFIG_ISA_ARCV2

	/* PGD cached in MMU reg to avoid 3 mem lookups: task->mm->pgd */

	write_aux_reg(ARC_REG_SCRATCH_DATA0, next->pgd);

#endif

arch/arc/include/asm/pgtable.h

+0 −23
Original line number Diff line number Diff line
@@ -284,29 +284,6 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 
	set_pte(ptep, pteval);

}



/*

 * Macro to quickly access the PGD entry, utlising the fact that some

 * arch may cache the pointer to Page Directory of "current" task

 * in a MMU register

 *

 * Thus task->mm->pgd (3 pointer dereferences, cache misses etc simply

 * becomes read a register

 *

 * ********CAUTION*******:

 * Kernel code might be dealing with some mm_struct of NON "current"

 * Thus use this macro only when you are certain that "current" is current

 * e.g. when dealing with signal frame setup code etc

 */

#ifdef ARC_USE_SCRATCH_REG

#define pgd_offset_fast(mm, addr)	\

({					\

	pgd_t *pgd_base = (pgd_t *) read_aux_reg(ARC_REG_SCRATCH_DATA0);  \

	pgd_base + pgd_index(addr);	\

})

#else

#define pgd_offset_fast(mm, addr)	pgd_offset(mm, addr)

#endif



extern pgd_t swapper_pg_dir[] __aligned(PAGE_SIZE);

void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,

		      pte_t *ptep);

arch/arc/mm/fault.c

+1 −1
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ noinline static int handle_kernel_vaddr_fault(unsigned long address) 
	pud_t *pud, *pud_k;

	pmd_t *pmd, *pmd_k;



	pgd = pgd_offset_fast(current->active_mm, address);

	pgd = pgd_offset(current->active_mm, address);

	pgd_k = pgd_offset_k(address);



	if (!pgd_present(*pgd_k))