!3744 Add NUMA-awareness to qspinlock

			NUMA balancing.

			Allowed values are enable and disable

	numa_spinlock=	[NUMA, PV_OPS] Select the NUMA-aware variant

			of spinlock. The options are:

			auto - Enable this variant if running on a multi-node

			machine in native environment.

			on  - Unconditionally enable this variant.

			off - Unconditionally disable this variant.

			Not specifying this option is equivalent to

			numa_spinlock=auto.

	numa_zonelist_order= [KNL, BOOT] Select zonelist order for NUMA.

			'node', 'default' can be specified

			This can be set from sysctl after boot.

			[KNL] Number of legacy pty's. Overwrites compiled-in

			default number.

	qspinlock.numa_spinlock_threshold_ns=	[NUMA, PV_OPS]

			Set the time threshold in nanoseconds for the

			number of intra-node lock hand-offs before the

			NUMA-aware spinlock is forced to be passed to

			a thread on another NUMA node. Smaller values

			result in a more fair, but less performant spinlock,

			and vice versa. The default value is 1000000 (=1ms).

	quiet		[KNL] Disable most log messages

	r128=		[HW,DRM]

#include <asm/spinlock.h>

/* MCS spin-locking. */

#define arch_mcs_spin_lock_contended(lock)				\

#define arch_mcs_spin_wait(lock)					\

do {									\

	/* Ensure prior stores are observed before we enter wfe. */	\

	smp_mb();							\

		wfe();							\

} while (0)								\

#define arch_mcs_spin_unlock_contended(lock)				\

#define arch_mcs_lock_handoff(lock, val)				\

do {									\

	smp_store_release(lock, 1);					\

	smp_store_release((lock), (val));				\

	dsb_sev();							\

} while (0)

	  Otherwise, you should say N.

config NUMA_AWARE_SPINLOCKS

	bool "Numa-aware spinlocks"

	depends on NUMA

	depends on QUEUED_SPINLOCKS

	depends on 64BIT

	# For now, we depend on PARAVIRT_SPINLOCKS to make the patching work.

	# This is awkward, but hopefully would be resolved once static_call()

	# is available.

	depends on PARAVIRT_SPINLOCKS

	default y

	help

	  Introduce NUMA (Non Uniform Memory Access) awareness into

	  the slow path of spinlocks.

	  In this variant of qspinlock, the kernel will try to keep the lock

	  on the same node, thus reducing the number of remote cache misses,

	  while trading some of the short term fairness for better performance.

	  Say N if you want absolute first come first serve fairness.

config AMD_NUMA

	def_bool y

	prompt "Old style AMD Opteron NUMA detection"

CONFIG_AMD_MEM_ENCRYPT=y

# CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT is not set

CONFIG_NUMA=y

CONFIG_NUMA_AWARE_SPINLOCKS=y

CONFIG_AMD_NUMA=y

CONFIG_X86_64_ACPI_NUMA=y

CONFIG_NUMA_EMU=y

	return val;

}

#ifdef CONFIG_NUMA_AWARE_SPINLOCKS

extern void cna_configure_spin_lock_slowpath(void);

#endif

#ifdef CONFIG_PARAVIRT_SPINLOCKS

extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);

extern void __pv_init_lock_hash(void);