Unverified Commit c42a1dba authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!3517 support CLOCKSOURCE_VALIDATE_LAST_CYCLE on 

Merge Pull Request from: @ci-robot 
 
PR sync from: Yu Liao <liaoyu15@huawei.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/I5UF3ABZ46P7SD3UEQSGKK2ZZWUE2A6L/ 
Yu Liao (2):
  timekeeping: Make CLOCKSOURCE_VALIDATE_LAST_CYCLE configurable
  config: make CLOCKSOURCE_VALIDATE_LAST_CYCLE not set by default


-- 
2.33.0
 
https://gitee.com/openeuler/kernel/issues/I8QEV8 
 
Link:https://gitee.com/openeuler/kernel/pulls/3517

 

Reviewed-by: default avatarXie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parents f9996385 e8c1d9d5

arch/arm64/configs/openeuler_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -71,6 +71,7 @@ CONFIG_CONTEXT_TRACKING_USER=y 
# CONFIG_CONTEXT_TRACKING_USER_FORCE is not set

CONFIG_NO_HZ=y

CONFIG_HIGH_RES_TIMERS=y

# CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE is not set

# end of Timers subsystem



CONFIG_BPF=y

kernel/time/Kconfig

+8 −5
Original line number Diff line number Diff line
@@ -17,11 +17,6 @@ config ARCH_CLOCKSOURCE_DATA 
config ARCH_CLOCKSOURCE_INIT

	bool



# Clocksources require validation of the clocksource against the last

# cycle update - x86/TSC misfeature

config CLOCKSOURCE_VALIDATE_LAST_CYCLE

	bool



# Timekeeping vsyscall support

config GENERIC_TIME_VSYSCALL

	bool
@@ -209,5 +204,13 @@ config CLOCKSOURCE_WATCHDOG_MAX_SKEW_US 
	  per million.	If the clocksource is good enough for NTP,

	  it is good enough for the clocksource watchdog!



# Clocksources require validation of the clocksource against the last

# cycle update - x86/TSC misfeature

config CLOCKSOURCE_VALIDATE_LAST_CYCLE

	bool "Validate last cycle of clocksource"

	help

	  Enable this option to validate the last cycle to prevent issues

	  caused by clocksource going backwards.



endmenu

endif