Loading arch/arm/mach-omap2/control.h +1 −0 Original line number Diff line number Diff line Loading @@ -201,6 +201,7 @@ #define OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO 0x249 #define OMAP44XX_CONTROL_FUSE_CORE_OPP50 0x254 #define OMAP44XX_CONTROL_FUSE_CORE_OPP100 0x257 #define OMAP44XX_CONTROL_FUSE_CORE_OPP100OV 0x25A /* AM35XX only CONTROL_GENERAL register offsets */ #define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038) Loading arch/arm/mach-omap2/omap_opp_data.h +6 −3 Original line number Diff line number Diff line Loading @@ -89,8 +89,11 @@ extern struct omap_volt_data omap34xx_vddcore_volt_data[]; extern struct omap_volt_data omap36xx_vddmpu_volt_data[]; extern struct omap_volt_data omap36xx_vddcore_volt_data[]; extern struct omap_volt_data omap44xx_vdd_mpu_volt_data[]; extern struct omap_volt_data omap44xx_vdd_iva_volt_data[]; extern struct omap_volt_data omap44xx_vdd_core_volt_data[]; extern struct omap_volt_data omap443x_vdd_mpu_volt_data[]; extern struct omap_volt_data omap443x_vdd_iva_volt_data[]; extern struct omap_volt_data omap443x_vdd_core_volt_data[]; extern struct omap_volt_data omap446x_vdd_mpu_volt_data[]; extern struct omap_volt_data omap446x_vdd_iva_volt_data[]; extern struct omap_volt_data omap446x_vdd_core_volt_data[]; #endif /* __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H */ arch/arm/mach-omap2/omap_twl.c +14 −59 Original line number Diff line number Diff line Loading @@ -30,16 +30,6 @@ #define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04 #define OMAP3_VP_VLIMITTO_TIMEOUT_US 200 #define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14 #define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42 #define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18 #define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2c #define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18 #define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3c #define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18 #define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30 #define OMAP4_SRI2C_SLAVE_ADDR 0x12 #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 #define OMAP4_VDD_MPU_SR_CMD_REG 0x56 Loading @@ -53,13 +43,6 @@ #define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04 #define OMAP4_VP_VLIMITTO_TIMEOUT_US 200 #define OMAP4_VP_MPU_VLIMITTO_VDDMIN 0xA #define OMAP4_VP_MPU_VLIMITTO_VDDMAX 0x39 #define OMAP4_VP_IVA_VLIMITTO_VDDMIN 0xA #define OMAP4_VP_IVA_VLIMITTO_VDDMAX 0x2D #define OMAP4_VP_CORE_VLIMITTO_VDDMIN 0xA #define OMAP4_VP_CORE_VLIMITTO_VDDMAX 0x28 static bool is_offset_valid; static u8 smps_offset; /* Loading Loading @@ -158,16 +141,11 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) static struct omap_voltdm_pmic omap3_mpu_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1200000, .onlp_volt = 1000000, .ret_volt = 975000, .off_volt = 600000, .volt_setup_time = 0xfff, .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX, .vp_vddmin = OMAP3430_VP1_VLIMITTO_VDDMIN, .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX, .vddmin = 600000, .vddmax = 1450000, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, Loading @@ -179,16 +157,11 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = { static struct omap_voltdm_pmic omap3_core_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1200000, .onlp_volt = 1000000, .ret_volt = 975000, .off_volt = 600000, .volt_setup_time = 0xfff, .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX, .vp_vddmin = OMAP3430_VP2_VLIMITTO_VDDMIN, .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX, .vddmin = 600000, .vddmax = 1450000, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, Loading @@ -200,21 +173,17 @@ static struct omap_voltdm_pmic omap3_core_pmic = { static struct omap_voltdm_pmic omap4_mpu_pmic = { .slew_rate = 4000, .step_size = 12660, .on_volt = 1375000, .onlp_volt = 1375000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, .vp_vddmin = OMAP4_VP_MPU_VLIMITTO_VDDMIN, .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX, .vddmin = 0, .vddmax = 2100000, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG, .i2c_high_speed = true, .i2c_pad_load = 3, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; Loading @@ -222,21 +191,17 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { static struct omap_voltdm_pmic omap4_iva_pmic = { .slew_rate = 4000, .step_size = 12660, .on_volt = 1188000, .onlp_volt = 1188000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, .vp_vddmin = OMAP4_VP_IVA_VLIMITTO_VDDMIN, .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX, .vddmin = 0, .vddmax = 2100000, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG, .i2c_high_speed = true, .i2c_pad_load = 3, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; Loading @@ -244,20 +209,17 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { static struct omap_voltdm_pmic omap4_core_pmic = { .slew_rate = 4000, .step_size = 12660, .on_volt = 1200000, .onlp_volt = 1200000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, .vp_vddmin = OMAP4_VP_CORE_VLIMITTO_VDDMIN, .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX, .vddmin = 0, .vddmax = 2100000, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG, .i2c_high_speed = true, .i2c_pad_load = 3, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; Loading Loading @@ -288,13 +250,6 @@ int __init omap3_twl_init(void) if (!cpu_is_omap34xx()) return -ENODEV; if (cpu_is_omap3630()) { omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; } /* * The smartreflex bit on twl4030 specifies if the setting of voltage * is done over the I2C_SR path. Since this setting is independent of Loading arch/arm/mach-omap2/opp4xxx_data.c +87 −11 Original line number Diff line number Diff line /* * OMAP4 OPP table definitions. * * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ * Copyright (C) 2010-2012 Texas Instruments Incorporated - http://www.ti.com/ * Nishanth Menon * Kevin Hilman * Thara Gopinath Loading Loading @@ -35,7 +35,7 @@ #define OMAP4430_VDD_MPU_OPPTURBO_UV 1313000 #define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000 struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = { struct omap_volt_data omap443x_vdd_mpu_volt_data[] = { VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), Loading @@ -47,7 +47,7 @@ struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = { #define OMAP4430_VDD_IVA_OPP100_UV 1188000 #define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000 struct omap_volt_data omap44xx_vdd_iva_volt_data[] = { struct omap_volt_data omap443x_vdd_iva_volt_data[] = { VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), Loading @@ -57,14 +57,14 @@ struct omap_volt_data omap44xx_vdd_iva_volt_data[] = { #define OMAP4430_VDD_CORE_OPP50_UV 1025000 #define OMAP4430_VDD_CORE_OPP100_UV 1200000 struct omap_volt_data omap44xx_vdd_core_volt_data[] = { struct omap_volt_data omap443x_vdd_core_volt_data[] = { VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(0, 0, 0, 0), }; static struct omap_opp_def __initdata omap44xx_opp_def_list[] = { static struct omap_opp_def __initdata omap443x_opp_def_list[] = { /* MPU OPP1 - OPP50 */ OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV), /* MPU OPP2 - OPP100 */ Loading @@ -86,6 +86,82 @@ static struct omap_opp_def __initdata omap44xx_opp_def_list[] = { /* TODO: add DSP, aess, fdif, gpu */ }; #define OMAP4460_VDD_MPU_OPP50_UV 1025000 #define OMAP4460_VDD_MPU_OPP100_UV 1200000 #define OMAP4460_VDD_MPU_OPPTURBO_UV 1313000 #define OMAP4460_VDD_MPU_OPPNITRO_UV 1375000 struct omap_volt_data omap446x_vdd_mpu_volt_data[] = { VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27), VOLT_DATA_DEFINE(0, 0, 0, 0), }; #define OMAP4460_VDD_IVA_OPP50_UV 1025000 #define OMAP4460_VDD_IVA_OPP100_UV 1200000 #define OMAP4460_VDD_IVA_OPPTURBO_UV 1313000 #define OMAP4460_VDD_IVA_OPPNITRO_UV 1375000 struct omap_volt_data omap446x_vdd_iva_volt_data[] = { VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPNITRO, 0xfa, 0x23), VOLT_DATA_DEFINE(0, 0, 0, 0), }; #define OMAP4460_VDD_CORE_OPP50_UV 1025000 #define OMAP4460_VDD_CORE_OPP100_UV 1200000 #define OMAP4460_VDD_CORE_OPP100_OV_UV 1250000 struct omap_volt_data omap446x_vdd_core_volt_data[] = { VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_OV_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100OV, 0xf9, 0x16), VOLT_DATA_DEFINE(0, 0, 0, 0), }; static struct omap_opp_def __initdata omap446x_opp_def_list[] = { /* MPU OPP1 - OPP50 */ OPP_INITIALIZER("mpu", true, 350000000, OMAP4460_VDD_MPU_OPP50_UV), /* MPU OPP2 - OPP100 */ OPP_INITIALIZER("mpu", true, 700000000, OMAP4460_VDD_MPU_OPP100_UV), /* MPU OPP3 - OPP-Turbo */ OPP_INITIALIZER("mpu", true, 920000000, OMAP4460_VDD_MPU_OPPTURBO_UV), /* * MPU OPP4 - OPP-Nitro + Disabled as the reference schematics * recommends TPS623631 - confirm and enable the opp in board file * XXX: May be we should enable these based on mpu capability and * Exception board files disable it... */ OPP_INITIALIZER("mpu", false, 1200000000, OMAP4460_VDD_MPU_OPPNITRO_UV), /* MPU OPP4 - OPP-Nitro SpeedBin */ OPP_INITIALIZER("mpu", false, 1500000000, OMAP4460_VDD_MPU_OPPNITRO_UV), /* L3 OPP1 - OPP50 */ OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4460_VDD_CORE_OPP50_UV), /* L3 OPP2 - OPP100 */ OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4460_VDD_CORE_OPP100_UV), /* IVA OPP1 - OPP50 */ OPP_INITIALIZER("iva", true, 133000000, OMAP4460_VDD_IVA_OPP50_UV), /* IVA OPP2 - OPP100 */ OPP_INITIALIZER("iva", true, 266100000, OMAP4460_VDD_IVA_OPP100_UV), /* * IVA OPP3 - OPP-Turbo + Disabled as the reference schematics * recommends Phoenix VCORE2 which can supply only 600mA - so the ones * above this OPP frequency, even though OMAP is capable, should be * enabled by board file which is sure of the chip power capability */ OPP_INITIALIZER("iva", false, 332000000, OMAP4460_VDD_IVA_OPPTURBO_UV), /* IVA OPP4 - OPP-Nitro */ OPP_INITIALIZER("iva", false, 430000000, OMAP4460_VDD_IVA_OPPNITRO_UV), /* IVA OPP5 - OPP-Nitro SpeedBin*/ OPP_INITIALIZER("iva", false, 500000000, OMAP4460_VDD_IVA_OPPNITRO_UV), /* TODO: add DSP, aess, fdif, gpu */ }; /** * omap4_opp_init() - initialize omap4 opp table */ Loading @@ -93,12 +169,12 @@ int __init omap4_opp_init(void) { int r = -ENODEV; if (!cpu_is_omap443x()) return r; r = omap_init_opp_table(omap44xx_opp_def_list, ARRAY_SIZE(omap44xx_opp_def_list)); if (cpu_is_omap443x()) r = omap_init_opp_table(omap443x_opp_def_list, ARRAY_SIZE(omap443x_opp_def_list)); else if (cpu_is_omap446x()) r = omap_init_opp_table(omap446x_opp_def_list, ARRAY_SIZE(omap446x_opp_def_list)); return r; } device_initcall(omap4_opp_init); arch/arm/mach-omap2/pm.c +30 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,36 @@ static struct omap_device_pm_latency *pm_lats; */ int (*omap_pm_suspend)(void); /** * struct omap2_oscillator - Describe the board main oscillator latencies * @startup_time: oscillator startup latency * @shutdown_time: oscillator shutdown latency */ struct omap2_oscillator { u32 startup_time; u32 shutdown_time; }; static struct omap2_oscillator oscillator = { .startup_time = ULONG_MAX, .shutdown_time = ULONG_MAX, }; void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { oscillator.startup_time = tstart; oscillator.shutdown_time = tshut; } void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { if (!tstart || !tshut) return; *tstart = oscillator.startup_time; *tshut = oscillator.shutdown_time; } static int __init _init_omap_device(char *name) { struct omap_hwmod *oh; Loading Loading
arch/arm/mach-omap2/control.h +1 −0 Original line number Diff line number Diff line Loading @@ -201,6 +201,7 @@ #define OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO 0x249 #define OMAP44XX_CONTROL_FUSE_CORE_OPP50 0x254 #define OMAP44XX_CONTROL_FUSE_CORE_OPP100 0x257 #define OMAP44XX_CONTROL_FUSE_CORE_OPP100OV 0x25A /* AM35XX only CONTROL_GENERAL register offsets */ #define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038) Loading
arch/arm/mach-omap2/omap_opp_data.h +6 −3 Original line number Diff line number Diff line Loading @@ -89,8 +89,11 @@ extern struct omap_volt_data omap34xx_vddcore_volt_data[]; extern struct omap_volt_data omap36xx_vddmpu_volt_data[]; extern struct omap_volt_data omap36xx_vddcore_volt_data[]; extern struct omap_volt_data omap44xx_vdd_mpu_volt_data[]; extern struct omap_volt_data omap44xx_vdd_iva_volt_data[]; extern struct omap_volt_data omap44xx_vdd_core_volt_data[]; extern struct omap_volt_data omap443x_vdd_mpu_volt_data[]; extern struct omap_volt_data omap443x_vdd_iva_volt_data[]; extern struct omap_volt_data omap443x_vdd_core_volt_data[]; extern struct omap_volt_data omap446x_vdd_mpu_volt_data[]; extern struct omap_volt_data omap446x_vdd_iva_volt_data[]; extern struct omap_volt_data omap446x_vdd_core_volt_data[]; #endif /* __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H */
arch/arm/mach-omap2/omap_twl.c +14 −59 Original line number Diff line number Diff line Loading @@ -30,16 +30,6 @@ #define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04 #define OMAP3_VP_VLIMITTO_TIMEOUT_US 200 #define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14 #define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42 #define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18 #define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2c #define OMAP3630_VP1_VLIMITTO_VDDMIN 0x18 #define OMAP3630_VP1_VLIMITTO_VDDMAX 0x3c #define OMAP3630_VP2_VLIMITTO_VDDMIN 0x18 #define OMAP3630_VP2_VLIMITTO_VDDMAX 0x30 #define OMAP4_SRI2C_SLAVE_ADDR 0x12 #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 #define OMAP4_VDD_MPU_SR_CMD_REG 0x56 Loading @@ -53,13 +43,6 @@ #define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04 #define OMAP4_VP_VLIMITTO_TIMEOUT_US 200 #define OMAP4_VP_MPU_VLIMITTO_VDDMIN 0xA #define OMAP4_VP_MPU_VLIMITTO_VDDMAX 0x39 #define OMAP4_VP_IVA_VLIMITTO_VDDMIN 0xA #define OMAP4_VP_IVA_VLIMITTO_VDDMAX 0x2D #define OMAP4_VP_CORE_VLIMITTO_VDDMIN 0xA #define OMAP4_VP_CORE_VLIMITTO_VDDMAX 0x28 static bool is_offset_valid; static u8 smps_offset; /* Loading Loading @@ -158,16 +141,11 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) static struct omap_voltdm_pmic omap3_mpu_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1200000, .onlp_volt = 1000000, .ret_volt = 975000, .off_volt = 600000, .volt_setup_time = 0xfff, .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX, .vp_vddmin = OMAP3430_VP1_VLIMITTO_VDDMIN, .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX, .vddmin = 600000, .vddmax = 1450000, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, Loading @@ -179,16 +157,11 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = { static struct omap_voltdm_pmic omap3_core_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1200000, .onlp_volt = 1000000, .ret_volt = 975000, .off_volt = 600000, .volt_setup_time = 0xfff, .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX, .vp_vddmin = OMAP3430_VP2_VLIMITTO_VDDMIN, .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX, .vddmin = 600000, .vddmax = 1450000, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, Loading @@ -200,21 +173,17 @@ static struct omap_voltdm_pmic omap3_core_pmic = { static struct omap_voltdm_pmic omap4_mpu_pmic = { .slew_rate = 4000, .step_size = 12660, .on_volt = 1375000, .onlp_volt = 1375000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, .vp_vddmin = OMAP4_VP_MPU_VLIMITTO_VDDMIN, .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX, .vddmin = 0, .vddmax = 2100000, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG, .i2c_high_speed = true, .i2c_pad_load = 3, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; Loading @@ -222,21 +191,17 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { static struct omap_voltdm_pmic omap4_iva_pmic = { .slew_rate = 4000, .step_size = 12660, .on_volt = 1188000, .onlp_volt = 1188000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, .vp_vddmin = OMAP4_VP_IVA_VLIMITTO_VDDMIN, .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX, .vddmin = 0, .vddmax = 2100000, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG, .i2c_high_speed = true, .i2c_pad_load = 3, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; Loading @@ -244,20 +209,17 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { static struct omap_voltdm_pmic omap4_core_pmic = { .slew_rate = 4000, .step_size = 12660, .on_volt = 1200000, .onlp_volt = 1200000, .ret_volt = 830000, .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX, .vp_vddmin = OMAP4_VP_CORE_VLIMITTO_VDDMIN, .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX, .vddmin = 0, .vddmax = 2100000, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG, .i2c_high_speed = true, .i2c_pad_load = 3, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; Loading Loading @@ -288,13 +250,6 @@ int __init omap3_twl_init(void) if (!cpu_is_omap34xx()) return -ENODEV; if (cpu_is_omap3630()) { omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; } /* * The smartreflex bit on twl4030 specifies if the setting of voltage * is done over the I2C_SR path. Since this setting is independent of Loading
arch/arm/mach-omap2/opp4xxx_data.c +87 −11 Original line number Diff line number Diff line /* * OMAP4 OPP table definitions. * * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ * Copyright (C) 2010-2012 Texas Instruments Incorporated - http://www.ti.com/ * Nishanth Menon * Kevin Hilman * Thara Gopinath Loading Loading @@ -35,7 +35,7 @@ #define OMAP4430_VDD_MPU_OPPTURBO_UV 1313000 #define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000 struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = { struct omap_volt_data omap443x_vdd_mpu_volt_data[] = { VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), Loading @@ -47,7 +47,7 @@ struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = { #define OMAP4430_VDD_IVA_OPP100_UV 1188000 #define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000 struct omap_volt_data omap44xx_vdd_iva_volt_data[] = { struct omap_volt_data omap443x_vdd_iva_volt_data[] = { VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), Loading @@ -57,14 +57,14 @@ struct omap_volt_data omap44xx_vdd_iva_volt_data[] = { #define OMAP4430_VDD_CORE_OPP50_UV 1025000 #define OMAP4430_VDD_CORE_OPP100_UV 1200000 struct omap_volt_data omap44xx_vdd_core_volt_data[] = { struct omap_volt_data omap443x_vdd_core_volt_data[] = { VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(0, 0, 0, 0), }; static struct omap_opp_def __initdata omap44xx_opp_def_list[] = { static struct omap_opp_def __initdata omap443x_opp_def_list[] = { /* MPU OPP1 - OPP50 */ OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV), /* MPU OPP2 - OPP100 */ Loading @@ -86,6 +86,82 @@ static struct omap_opp_def __initdata omap44xx_opp_def_list[] = { /* TODO: add DSP, aess, fdif, gpu */ }; #define OMAP4460_VDD_MPU_OPP50_UV 1025000 #define OMAP4460_VDD_MPU_OPP100_UV 1200000 #define OMAP4460_VDD_MPU_OPPTURBO_UV 1313000 #define OMAP4460_VDD_MPU_OPPNITRO_UV 1375000 struct omap_volt_data omap446x_vdd_mpu_volt_data[] = { VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27), VOLT_DATA_DEFINE(0, 0, 0, 0), }; #define OMAP4460_VDD_IVA_OPP50_UV 1025000 #define OMAP4460_VDD_IVA_OPP100_UV 1200000 #define OMAP4460_VDD_IVA_OPPTURBO_UV 1313000 #define OMAP4460_VDD_IVA_OPPNITRO_UV 1375000 struct omap_volt_data omap446x_vdd_iva_volt_data[] = { VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPNITRO, 0xfa, 0x23), VOLT_DATA_DEFINE(0, 0, 0, 0), }; #define OMAP4460_VDD_CORE_OPP50_UV 1025000 #define OMAP4460_VDD_CORE_OPP100_UV 1200000 #define OMAP4460_VDD_CORE_OPP100_OV_UV 1250000 struct omap_volt_data omap446x_vdd_core_volt_data[] = { VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_OV_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100OV, 0xf9, 0x16), VOLT_DATA_DEFINE(0, 0, 0, 0), }; static struct omap_opp_def __initdata omap446x_opp_def_list[] = { /* MPU OPP1 - OPP50 */ OPP_INITIALIZER("mpu", true, 350000000, OMAP4460_VDD_MPU_OPP50_UV), /* MPU OPP2 - OPP100 */ OPP_INITIALIZER("mpu", true, 700000000, OMAP4460_VDD_MPU_OPP100_UV), /* MPU OPP3 - OPP-Turbo */ OPP_INITIALIZER("mpu", true, 920000000, OMAP4460_VDD_MPU_OPPTURBO_UV), /* * MPU OPP4 - OPP-Nitro + Disabled as the reference schematics * recommends TPS623631 - confirm and enable the opp in board file * XXX: May be we should enable these based on mpu capability and * Exception board files disable it... */ OPP_INITIALIZER("mpu", false, 1200000000, OMAP4460_VDD_MPU_OPPNITRO_UV), /* MPU OPP4 - OPP-Nitro SpeedBin */ OPP_INITIALIZER("mpu", false, 1500000000, OMAP4460_VDD_MPU_OPPNITRO_UV), /* L3 OPP1 - OPP50 */ OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4460_VDD_CORE_OPP50_UV), /* L3 OPP2 - OPP100 */ OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4460_VDD_CORE_OPP100_UV), /* IVA OPP1 - OPP50 */ OPP_INITIALIZER("iva", true, 133000000, OMAP4460_VDD_IVA_OPP50_UV), /* IVA OPP2 - OPP100 */ OPP_INITIALIZER("iva", true, 266100000, OMAP4460_VDD_IVA_OPP100_UV), /* * IVA OPP3 - OPP-Turbo + Disabled as the reference schematics * recommends Phoenix VCORE2 which can supply only 600mA - so the ones * above this OPP frequency, even though OMAP is capable, should be * enabled by board file which is sure of the chip power capability */ OPP_INITIALIZER("iva", false, 332000000, OMAP4460_VDD_IVA_OPPTURBO_UV), /* IVA OPP4 - OPP-Nitro */ OPP_INITIALIZER("iva", false, 430000000, OMAP4460_VDD_IVA_OPPNITRO_UV), /* IVA OPP5 - OPP-Nitro SpeedBin*/ OPP_INITIALIZER("iva", false, 500000000, OMAP4460_VDD_IVA_OPPNITRO_UV), /* TODO: add DSP, aess, fdif, gpu */ }; /** * omap4_opp_init() - initialize omap4 opp table */ Loading @@ -93,12 +169,12 @@ int __init omap4_opp_init(void) { int r = -ENODEV; if (!cpu_is_omap443x()) return r; r = omap_init_opp_table(omap44xx_opp_def_list, ARRAY_SIZE(omap44xx_opp_def_list)); if (cpu_is_omap443x()) r = omap_init_opp_table(omap443x_opp_def_list, ARRAY_SIZE(omap443x_opp_def_list)); else if (cpu_is_omap446x()) r = omap_init_opp_table(omap446x_opp_def_list, ARRAY_SIZE(omap446x_opp_def_list)); return r; } device_initcall(omap4_opp_init);
arch/arm/mach-omap2/pm.c +30 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,36 @@ static struct omap_device_pm_latency *pm_lats; */ int (*omap_pm_suspend)(void); /** * struct omap2_oscillator - Describe the board main oscillator latencies * @startup_time: oscillator startup latency * @shutdown_time: oscillator shutdown latency */ struct omap2_oscillator { u32 startup_time; u32 shutdown_time; }; static struct omap2_oscillator oscillator = { .startup_time = ULONG_MAX, .shutdown_time = ULONG_MAX, }; void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { oscillator.startup_time = tstart; oscillator.shutdown_time = tshut; } void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { if (!tstart || !tshut) return; *tstart = oscillator.startup_time; *tshut = oscillator.shutdown_time; } static int __init _init_omap_device(char *name) { struct omap_hwmod *oh; Loading