Loading arch/arm/mach-omap2/clock33xx_data.c +6 −6 Original line number Diff line number Diff line Loading @@ -548,16 +548,16 @@ static struct clk mcasp1_fck = { .recalc = &followparent_recalc, }; static struct clk smartreflex0_fck = { .name = "smartreflex0_fck", static struct clk smartreflex_mpu_fck = { .name = "smartreflex_mpu_fck", .clkdm_name = "l4_wkup_clkdm", .parent = &sys_clkin_ck, .ops = &clkops_null, .recalc = &followparent_recalc, }; static struct clk smartreflex1_fck = { .name = "smartreflex1_fck", static struct clk smartreflex_core_fck = { .name = "smartreflex_core_fck", .clkdm_name = "l4_wkup_clkdm", .parent = &sys_clkin_ck, .ops = &clkops_null, Loading Loading @@ -1039,8 +1039,8 @@ static struct omap_clk am33xx_clks[] = { CLK(NULL, "mcasp1_fck", &mcasp1_fck, CK_AM33XX), CLK("NULL", "mmc2_fck", &mmc2_fck, CK_AM33XX), CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX), CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX), CLK(NULL, "smartreflex1_fck", &smartreflex1_fck, CK_AM33XX), CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_AM33XX), CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_AM33XX), CLK(NULL, "timer1_fck", &timer1_fck, CK_AM33XX), CLK(NULL, "timer2_fck", &timer2_fck, CK_AM33XX), CLK(NULL, "timer3_fck", &timer3_fck, CK_AM33XX), Loading arch/arm/mach-omap2/clock3xxx_data.c +6 −6 Original line number Diff line number Diff line Loading @@ -3050,8 +3050,8 @@ static struct clk traceclk_fck = { /* SR clocks */ /* SmartReflex fclk (VDD1) */ static struct clk sr1_fck = { .name = "sr1_fck", static struct clk smartreflex_mpu_iva_fck = { .name = "smartreflex_mpu_iva_fck", .ops = &clkops_omap2_dflt_wait, .parent = &sys_ck, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), Loading @@ -3061,8 +3061,8 @@ static struct clk sr1_fck = { }; /* SmartReflex fclk (VDD2) */ static struct clk sr2_fck = { .name = "sr2_fck", static struct clk smartreflex_core_fck = { .name = "smartreflex_core_fck", .ops = &clkops_omap2_dflt_wait, .parent = &sys_ck, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), Loading Loading @@ -3478,8 +3478,8 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "atclk_fck", &atclk_fck, CK_3XXX), CLK(NULL, "traceclk_src_fck", &traceclk_src_fck, CK_3XXX), CLK(NULL, "traceclk_fck", &traceclk_fck, CK_3XXX), CLK(NULL, "sr1_fck", &sr1_fck, CK_34XX | CK_36XX), CLK(NULL, "sr2_fck", &sr2_fck, CK_34XX | CK_36XX), CLK(NULL, "smartreflex_mpu_iva_fck", &smartreflex_mpu_iva_fck, CK_34XX | CK_36XX), CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_34XX | CK_36XX), CLK(NULL, "sr_l4_ick", &sr_l4_ick, CK_34XX | CK_36XX), CLK(NULL, "secure_32k_fck", &secure_32k_fck, CK_3XXX), CLK(NULL, "gpt12_fck", &gpt12_fck, CK_3XXX), Loading arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +4 −4 Original line number Diff line number Diff line Loading @@ -1406,7 +1406,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = { static struct omap_hwmod omap34xx_sr1_hwmod = { .name = "smartreflex_mpu_iva", .class = &omap34xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", .main_clk = "smartreflex_mpu_iva_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading @@ -1424,7 +1424,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { static struct omap_hwmod omap36xx_sr1_hwmod = { .name = "smartreflex_mpu_iva", .class = &omap36xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", .main_clk = "smartreflex_mpu_iva_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading @@ -1451,7 +1451,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = { static struct omap_hwmod omap34xx_sr2_hwmod = { .name = "smartreflex_core", .class = &omap34xx_smartreflex_hwmod_class, .main_clk = "sr2_fck", .main_clk = "smartreflex_core_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading @@ -1469,7 +1469,7 @@ static struct omap_hwmod omap34xx_sr2_hwmod = { static struct omap_hwmod omap36xx_sr2_hwmod = { .name = "smartreflex_core", .class = &omap36xx_smartreflex_hwmod_class, .main_clk = "sr2_fck", .main_clk = "smartreflex_core_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading arch/arm/mach-omap2/sr_device.c +13 −0 Original line number Diff line number Diff line Loading @@ -121,6 +121,19 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user) sr_data->senn_mod = 0x1; sr_data->senp_mod = 0x1; if (cpu_is_omap34xx() || cpu_is_omap44xx()) { sr_data->err_weight = OMAP3430_SR_ERRWEIGHT; sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; sr_data->accum_data = OMAP3430_SR_ACCUMDATA; if (!(strcmp(sr_data->name, "smartreflex_mpu"))) { sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; } else { sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; } } sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name); if (!sr_data->voltdm) { pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", Loading drivers/power/avs/smartreflex.c +17 −37 Original line number Diff line number Diff line Loading @@ -130,24 +130,21 @@ static irqreturn_t sr_interrupt(int irq, void *data) static void sr_set_clk_length(struct omap_sr *sr) { struct clk *sys_ck; u32 sys_clk_speed; struct clk *fck; u32 fclk_speed; if (cpu_is_omap34xx()) sys_ck = clk_get(NULL, "sys_ck"); else sys_ck = clk_get(NULL, "sys_clkin_ck"); fck = clk_get(&sr->pdev->dev, "fck"); if (IS_ERR(sys_ck)) { dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n", __func__); if (IS_ERR(fck)) { dev_err(&sr->pdev->dev, "%s: unable to get fck for device %s\n", __func__, dev_name(&sr->pdev->dev)); return; } sys_clk_speed = clk_get_rate(sys_ck); clk_put(sys_ck); fclk_speed = clk_get_rate(fck); clk_put(fck); switch (sys_clk_speed) { switch (fclk_speed) { case 12000000: sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; break; Loading @@ -164,34 +161,12 @@ static void sr_set_clk_length(struct omap_sr *sr) sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; break; default: dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n", __func__, sys_clk_speed); dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n", __func__, fclk_speed); break; } } static void sr_set_regfields(struct omap_sr *sr) { /* * For time being these values are defined in smartreflex.h * and populated during init. May be they can be moved to board * file or pmic specific data structure. In that case these structure * fields will have to be populated using the pdata or pmic structure. */ if (cpu_is_omap34xx() || cpu_is_omap44xx()) { sr->err_weight = OMAP3430_SR_ERRWEIGHT; sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; sr->accum_data = OMAP3430_SR_ACCUMDATA; if (!(strcmp(sr->name, "smartreflex_mpu_iva"))) { sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; } else { sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; } } } static void sr_start_vddautocomp(struct omap_sr *sr) { if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { Loading Loading @@ -924,8 +899,14 @@ static int __init omap_sr_probe(struct platform_device *pdev) sr_info->nvalue_count = pdata->nvalue_count; sr_info->senn_mod = pdata->senn_mod; sr_info->senp_mod = pdata->senp_mod; sr_info->err_weight = pdata->err_weight; sr_info->err_maxlimit = pdata->err_maxlimit; sr_info->accum_data = pdata->accum_data; sr_info->senn_avgweight = pdata->senn_avgweight; sr_info->senp_avgweight = pdata->senp_avgweight; sr_info->autocomp_active = false; sr_info->ip_type = pdata->ip_type; sr_info->base = ioremap(mem->start, resource_size(mem)); if (!sr_info->base) { dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); Loading @@ -937,7 +918,6 @@ static int __init omap_sr_probe(struct platform_device *pdev) sr_info->irq = irq->start; sr_set_clk_length(sr_info); sr_set_regfields(sr_info); list_add(&sr_info->node, &sr_list); Loading Loading
arch/arm/mach-omap2/clock33xx_data.c +6 −6 Original line number Diff line number Diff line Loading @@ -548,16 +548,16 @@ static struct clk mcasp1_fck = { .recalc = &followparent_recalc, }; static struct clk smartreflex0_fck = { .name = "smartreflex0_fck", static struct clk smartreflex_mpu_fck = { .name = "smartreflex_mpu_fck", .clkdm_name = "l4_wkup_clkdm", .parent = &sys_clkin_ck, .ops = &clkops_null, .recalc = &followparent_recalc, }; static struct clk smartreflex1_fck = { .name = "smartreflex1_fck", static struct clk smartreflex_core_fck = { .name = "smartreflex_core_fck", .clkdm_name = "l4_wkup_clkdm", .parent = &sys_clkin_ck, .ops = &clkops_null, Loading Loading @@ -1039,8 +1039,8 @@ static struct omap_clk am33xx_clks[] = { CLK(NULL, "mcasp1_fck", &mcasp1_fck, CK_AM33XX), CLK("NULL", "mmc2_fck", &mmc2_fck, CK_AM33XX), CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX), CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX), CLK(NULL, "smartreflex1_fck", &smartreflex1_fck, CK_AM33XX), CLK(NULL, "smartreflex_mpu_fck", &smartreflex_mpu_fck, CK_AM33XX), CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_AM33XX), CLK(NULL, "timer1_fck", &timer1_fck, CK_AM33XX), CLK(NULL, "timer2_fck", &timer2_fck, CK_AM33XX), CLK(NULL, "timer3_fck", &timer3_fck, CK_AM33XX), Loading
arch/arm/mach-omap2/clock3xxx_data.c +6 −6 Original line number Diff line number Diff line Loading @@ -3050,8 +3050,8 @@ static struct clk traceclk_fck = { /* SR clocks */ /* SmartReflex fclk (VDD1) */ static struct clk sr1_fck = { .name = "sr1_fck", static struct clk smartreflex_mpu_iva_fck = { .name = "smartreflex_mpu_iva_fck", .ops = &clkops_omap2_dflt_wait, .parent = &sys_ck, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), Loading @@ -3061,8 +3061,8 @@ static struct clk sr1_fck = { }; /* SmartReflex fclk (VDD2) */ static struct clk sr2_fck = { .name = "sr2_fck", static struct clk smartreflex_core_fck = { .name = "smartreflex_core_fck", .ops = &clkops_omap2_dflt_wait, .parent = &sys_ck, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), Loading Loading @@ -3478,8 +3478,8 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "atclk_fck", &atclk_fck, CK_3XXX), CLK(NULL, "traceclk_src_fck", &traceclk_src_fck, CK_3XXX), CLK(NULL, "traceclk_fck", &traceclk_fck, CK_3XXX), CLK(NULL, "sr1_fck", &sr1_fck, CK_34XX | CK_36XX), CLK(NULL, "sr2_fck", &sr2_fck, CK_34XX | CK_36XX), CLK(NULL, "smartreflex_mpu_iva_fck", &smartreflex_mpu_iva_fck, CK_34XX | CK_36XX), CLK(NULL, "smartreflex_core_fck", &smartreflex_core_fck, CK_34XX | CK_36XX), CLK(NULL, "sr_l4_ick", &sr_l4_ick, CK_34XX | CK_36XX), CLK(NULL, "secure_32k_fck", &secure_32k_fck, CK_3XXX), CLK(NULL, "gpt12_fck", &gpt12_fck, CK_3XXX), Loading
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +4 −4 Original line number Diff line number Diff line Loading @@ -1406,7 +1406,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = { static struct omap_hwmod omap34xx_sr1_hwmod = { .name = "smartreflex_mpu_iva", .class = &omap34xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", .main_clk = "smartreflex_mpu_iva_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading @@ -1424,7 +1424,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { static struct omap_hwmod omap36xx_sr1_hwmod = { .name = "smartreflex_mpu_iva", .class = &omap36xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", .main_clk = "smartreflex_mpu_iva_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading @@ -1451,7 +1451,7 @@ static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = { static struct omap_hwmod omap34xx_sr2_hwmod = { .name = "smartreflex_core", .class = &omap34xx_smartreflex_hwmod_class, .main_clk = "sr2_fck", .main_clk = "smartreflex_core_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading @@ -1469,7 +1469,7 @@ static struct omap_hwmod omap34xx_sr2_hwmod = { static struct omap_hwmod omap36xx_sr2_hwmod = { .name = "smartreflex_core", .class = &omap36xx_smartreflex_hwmod_class, .main_clk = "sr2_fck", .main_clk = "smartreflex_core_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, Loading
arch/arm/mach-omap2/sr_device.c +13 −0 Original line number Diff line number Diff line Loading @@ -121,6 +121,19 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user) sr_data->senn_mod = 0x1; sr_data->senp_mod = 0x1; if (cpu_is_omap34xx() || cpu_is_omap44xx()) { sr_data->err_weight = OMAP3430_SR_ERRWEIGHT; sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; sr_data->accum_data = OMAP3430_SR_ACCUMDATA; if (!(strcmp(sr_data->name, "smartreflex_mpu"))) { sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; } else { sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; } } sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name); if (!sr_data->voltdm) { pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", Loading
drivers/power/avs/smartreflex.c +17 −37 Original line number Diff line number Diff line Loading @@ -130,24 +130,21 @@ static irqreturn_t sr_interrupt(int irq, void *data) static void sr_set_clk_length(struct omap_sr *sr) { struct clk *sys_ck; u32 sys_clk_speed; struct clk *fck; u32 fclk_speed; if (cpu_is_omap34xx()) sys_ck = clk_get(NULL, "sys_ck"); else sys_ck = clk_get(NULL, "sys_clkin_ck"); fck = clk_get(&sr->pdev->dev, "fck"); if (IS_ERR(sys_ck)) { dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n", __func__); if (IS_ERR(fck)) { dev_err(&sr->pdev->dev, "%s: unable to get fck for device %s\n", __func__, dev_name(&sr->pdev->dev)); return; } sys_clk_speed = clk_get_rate(sys_ck); clk_put(sys_ck); fclk_speed = clk_get_rate(fck); clk_put(fck); switch (sys_clk_speed) { switch (fclk_speed) { case 12000000: sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; break; Loading @@ -164,34 +161,12 @@ static void sr_set_clk_length(struct omap_sr *sr) sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; break; default: dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n", __func__, sys_clk_speed); dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n", __func__, fclk_speed); break; } } static void sr_set_regfields(struct omap_sr *sr) { /* * For time being these values are defined in smartreflex.h * and populated during init. May be they can be moved to board * file or pmic specific data structure. In that case these structure * fields will have to be populated using the pdata or pmic structure. */ if (cpu_is_omap34xx() || cpu_is_omap44xx()) { sr->err_weight = OMAP3430_SR_ERRWEIGHT; sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; sr->accum_data = OMAP3430_SR_ACCUMDATA; if (!(strcmp(sr->name, "smartreflex_mpu_iva"))) { sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; } else { sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; } } } static void sr_start_vddautocomp(struct omap_sr *sr) { if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { Loading Loading @@ -924,8 +899,14 @@ static int __init omap_sr_probe(struct platform_device *pdev) sr_info->nvalue_count = pdata->nvalue_count; sr_info->senn_mod = pdata->senn_mod; sr_info->senp_mod = pdata->senp_mod; sr_info->err_weight = pdata->err_weight; sr_info->err_maxlimit = pdata->err_maxlimit; sr_info->accum_data = pdata->accum_data; sr_info->senn_avgweight = pdata->senn_avgweight; sr_info->senp_avgweight = pdata->senp_avgweight; sr_info->autocomp_active = false; sr_info->ip_type = pdata->ip_type; sr_info->base = ioremap(mem->start, resource_size(mem)); if (!sr_info->base) { dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); Loading @@ -937,7 +918,6 @@ static int __init omap_sr_probe(struct platform_device *pdev) sr_info->irq = irq->start; sr_set_clk_length(sr_info); sr_set_regfields(sr_info); list_add(&sr_info->node, &sr_list); Loading