Commit 4435467b authored by Peng Fan's avatar Peng Fan Committed by Abel Vesa
Browse files

clk: imx: fracn-gppll: disable hardware select control 



When programming PLL, should disable Hardware control select to make PLL
controlled by register, not hardware inputs through OSCPLL.

Fixes: 1b26cb8a ("clk: imx: support fracn gppll")
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Reviewed-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230403095300.3386988-3-peng.fan@oss.nxp.com


Signed-off-by: default avatarAbel Vesa <abel.vesa@linaro.org>
parent cf8dccfe

drivers/clk/imx/clk-fracn-gppll.c

+6 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include "clk.h"



#define PLL_CTRL		0x0

#define HW_CTRL_SEL		BIT(16)

#define CLKMUX_BYPASS		BIT(2)

#define CLKMUX_EN		BIT(1)

#define POWERUP_MASK		BIT(0)
@@ -193,6 +194,11 @@ static int clk_fracn_gppll_set_rate(struct clk_hw *hw, unsigned long drate, 


	rate = imx_get_pll_settings(pll, drate);



	/* Hardware control select disable. PLL is control by register */

	tmp = readl_relaxed(pll->base + PLL_CTRL);

	tmp &= ~HW_CTRL_SEL;

	writel_relaxed(tmp, pll->base + PLL_CTRL);



	/* Disable output */

	tmp = readl_relaxed(pll->base + PLL_CTRL);

	tmp &= ~CLKMUX_EN;