perf/x86/intel: Add Crestmont PMU

mainline inclusion
from mainline-v6.6-rc1
commit a430021f
category: feature
feature: SRF core PMU support
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I8RWG5
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=a430021faad6b4fa86c820fc3e7f8dbfc2f14fb4



Intel-SIG: commit a430021f perf/x86/intel: Add Crestmont PMU
Backport Sierra Forrest core PMU support to kernel 5.10.

-------------------------------------

The Grand Ridge and Sierra Forest are successors to Snow Ridge. They
both have Crestmont core. From the core PMU's perspective, they are
similar to the e-core of MTL. The only difference is the LBR event
logging feature, which will be implemented in the following patches.

Create a non-hybrid PMU setup for Grand Ridge and Sierra Forest.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lore.kernel.org/r/20230522113040.2329924-1-kan.liang@linux.intel.com


Signed-off-by: Yunying Sun <yunying.sun@intel.com>