Commit 43e3293f authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: add support for MDP_TOP blackhole 



On sm8450 a register block was removed from MDP TOP. Accessing it during
snapshotting results in NoC errors / immediate reboot. Skip accessing
these registers during snapshot.

Tested-by: default avatarVinod Koul <vkoul@kernel.org>
Reviewed-by: default avatarVinod Koul <vkoul@kernel.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/514239/
Link: https://lore.kernel.org/r/20221207012231.112059-10-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent dbe2422b

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

+3 −0
Original line number Diff line number Diff line
@@ -83,6 +83,8 @@ enum { 
 * @DPU_MDP_UBWC_1_0,      This chipsets supports Universal Bandwidth

 *                         compression initial revision

 * @DPU_MDP_UBWC_1_5,      Universal Bandwidth compression version 1.5

 * @DPU_MDP_PERIPH_0_REMOVED Indicates that access to periph top0 block results

 *			   in a failure

 * @DPU_MDP_MAX            Maximum value



 */
@@ -93,6 +95,7 @@ enum { 
	DPU_MDP_UBWC_1_0,

	DPU_MDP_UBWC_1_5,

	DPU_MDP_AUDIO_SELECT,

	DPU_MDP_PERIPH_0_REMOVED,

	DPU_MDP_MAX

};

drivers/gpu/drm/msm/disp/dpu1/dpu_hwio.h

+3 −0
Original line number Diff line number Diff line
@@ -63,4 +63,7 @@ 
#define MDP_WD_TIMER_4_LOAD_VALUE       0x448

#define DCE_SEL                         0x450



#define MDP_PERIPH_TOP0			MDP_WD_TIMER_0_CTL

#define MDP_PERIPH_TOP0_END		CLK_CTRL3



#endif /*_DPU_HWIO_H */

drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c

+9 −2
Original line number Diff line number Diff line
@@ -927,8 +927,15 @@ static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_k 
		msm_disp_snapshot_add_block(disp_state, cat->wb[i].len,

				dpu_kms->mmio + cat->wb[i].base, "wb_%d", i);



	if (cat->mdp[0].features & BIT(DPU_MDP_PERIPH_0_REMOVED)) {

		msm_disp_snapshot_add_block(disp_state, MDP_PERIPH_TOP0,

				dpu_kms->mmio + cat->mdp[0].base, "top");

		msm_disp_snapshot_add_block(disp_state, cat->mdp[0].len - MDP_PERIPH_TOP0_END,

				dpu_kms->mmio + cat->mdp[0].base + MDP_PERIPH_TOP0_END, "top_2");

	} else {

		msm_disp_snapshot_add_block(disp_state, cat->mdp[0].len,

				dpu_kms->mmio + cat->mdp[0].base, "top");

	}



	pm_runtime_put_sync(&dpu_kms->pdev->dev);

}