dmaengine: idxd: assign MSIX vectors to each WQ rather than roundrobin

mainline inclusion
from mainline-v5.15
commit 6cfd9e62
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I596WO


CVE: NA

Intel-SIG: commit 6cfd9e62 dmaengine: idxd: assign MSIX vectors to each WQ rather than roundrobin.
Incremental backporting patches for DSA/IAA on Intel Xeon platform.

Deviation from upstream:
Merge commit da435aed dmaengine: idxd: fix array index when int_handles are being used.

--------------------------------

IOPS increased when changing MSIX vector to per WQ from roundrobin.
Allows descriptor to be completed by the submitter improves caching
locality.

Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Link: https://lore.kernel.org/r/162456717326.1130457.15258077196523268356.stgit@djiang5-desk3.ch.intel.com


Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Xiaochen Shen <xiaochen.shen@intel.com>