dt-bindings: arm: Add binding for Page Based Hardware Attributes

maillist inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I7ZC0H

Reference: https://lore.kernel.org/all/20211015161416.2196-1-james.morse@arm.com/t/#u



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ARM CPUs with the FEAT_HPDS2 feature allow an IMPLEMENTATION DEFINED
hardware attribute to be encoded in the leaf page table entries and
sent with any transaction that makes an access via that entry.

Some designs are using these bits as a hint to the system-cache
that it should apply a particular policy to this access. e.g. to
prioritise the caching of particular workload data.

The arm-arm doesn't define what these bits mean. Implementations
could use this to encrypt, or otherwise corrupt data. Setting an
'incorrect' value may lead to correctness or coherency issues.
The arm-arm only defines '0' as a safe default value.

As there are only four bits, it is likely these will be combined
and treated as a four-bit value by some hardware. This binding
expects values. Using values allows firmware to describe that two
bits should not be set at the same time.

To allow these hints to be used, add a way of describing which
values only have a performance impact, and which can only be
used if all mappings use the same PBHA value. This goes in the
cpus node binding, as it must be the same for all CPUs.

Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Ma Wupeng <mawupeng1@huawei.com>