Commit 41751b3e authored Feb 03, 2021 by Ville Syrjälä

drm/i915: Reject 446-480MHz HDMI clock on GLK

The BXT/GLK DPLL can't generate certain frequencies. We already
reject the 233-240MHz range on both. But on GLK the DPLL max
frequency was bumped from 300MHz to 594MHz, so now we get to
also worry about the 446-480MHz range (double the original
problem range). Reject any frequency within the higher
problematic range as well.

Cc: stable@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3000


Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210203093044.30532-1-ville.syrjala@linux.intel.com


Reviewed-by: Mika Kahola <mika.kahola@intel.com>

parent 7962893e

drivers/gpu/drm/i915/display/intel_hdmi.c

+5 −1

Original line number	Diff line number	Diff line
		@@ -2218,7 +2218,11 @@ hdmi_port_clock_valid(struct intel_hdmi *hdmi,
		has_hdmi_sink))
		return MODE_CLOCK_HIGH;

		/* BXT DPLL can't generate 223-240 MHz */
		/* GLK DPLL can't generate 446-480 MHz */
		if (IS_GEMINILAKE(dev_priv) && clock > 446666 && clock < 480000)
		return MODE_CLOCK_RANGE;

		/* BXT/GLK DPLL can't generate 223-240 MHz */
		if (IS_GEN9_LP(dev_priv) && clock > 223333 && clock < 240000)
		return MODE_CLOCK_RANGE;