Documentation: Add documentation for Hisilicon SoC PMU DTS binding

ascend inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I4D4WR


CVE: NA

---------------------------

Driver providing perf backend for LPDDRC and L3T PMU hardware
found in Hisilicon Soc.

Signed-off-by: Fang Lijun <fanglijun3@huawei.com>
Reviewed-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>