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Commit 3dfe6e17 authored by Pablo Sun's avatar Pablo Sun Committed by Chen-Yu Tsai
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clk: mediatek: add VDOSYS1 clock



Add the clock gate definition for the DPI1 hardware
in VDOSYS1.

The parent clock "hdmi_txpll" is already defined in
`mt8195.dtsi`.

Signed-off-by: default avatarPablo Sun <pablo.sun@mediatek.com>
Signed-off-by: default avatarGuillaume Ranquet <granquet@baylibre.com>
Reviewed-by: default avatarChen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220919-v1-2-4844816c9808@baylibre.com


Signed-off-by: default avatarChen-Yu Tsai <wenst@chromium.org>
parent 879b752b
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