Commit 3c9c31c2 authored by Sibi Sankar's avatar Sibi Sankar Committed by Bjorn Andersson
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arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant 



Add DDR/L3 bandwidth votes for the pro variant of SC7180 SoC, as it support
frequencies upto 2.5 GHz.

Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarSibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1606198876-3515-2-git-send-email-sibis@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 8fd01e01

arch/arm64/boot/dts/qcom/sc7180.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -527,6 +527,11 @@ 
			opp-hz = /bits/ 64 <2400000000>;

			opp-peak-kBps = <8532000 23347200>;

		};



		cpu6_opp16: opp-2553600000 {

			opp-hz = /bits/ 64 <2553600000>;

			opp-peak-kBps = <8532000 23347200>;

		};

	};



	memory@80000000 {