Commit 8fd01e01 authored by Sibi Sankar's avatar Sibi Sankar Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite 



Tweak the DDR/L3 bandwidth votes on the lite variant of the SC7180 SoC
since the gold cores only support frequencies upto 2.1 GHz.

Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarSibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1606198876-3515-1-git-send-email-sibis@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent d4b85bc5

arch/arm64/boot/dts/qcom/sc7180-lite.dtsi

0 → 100644
+18 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: BSD-3-Clause

/*

 * SC7180 lite device tree source

 *

 * Copyright (c) 2020, The Linux Foundation. All rights reserved.

 */



&cpu6_opp10 {

	opp-peak-kBps = <7216000 22425600>;

};



&cpu6_opp11 {

	opp-peak-kBps = <7216000 22425600>;

};



&cpu6_opp12 {

	opp-peak-kBps = <8532000 23347200>;

};