Commit 3bb001b6 authored by Ashok Raj's avatar Ashok Raj Committed by Aichun Shi
Browse files

x86/microcode: Check CPU capabilities after late microcode update correctly 

stable inclusion
from stable-v5.10.173
commit 511e27e5fdd658e6cb06b4947fb0d3ac76163776
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I873BU
CVE: N/A
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=511e27e5fdd658e6cb06b4947fb0d3ac76163776



-------------------------------------

Intel-SIG: commit 511e27e5fdd6 x86/microcode: Check CPU capabilities after late microcode update correctly.
Backport x86/microcode related patches from 5.10.173 upstream.

-------------------------------------

[ Upstream commit c0dd9245 ]

The kernel caches each CPU's feature bits at boot in an x86_capability[]
structure. However, the capabilities in the BSP's copy can be turned off
as a result of certain command line parameters or configuration
restrictions, for example the SGX bit. This can cause a mismatch when
comparing the values before and after the microcode update.

Another example is X86_FEATURE_SRBDS_CTRL which gets added only after
microcode update:

  									     ^^^

and which proves for a gazillionth time that late loading is a bad bad
idea.

microcode_check() is called after an update to report any previously
cached CPUID bits which might have changed due to the update.

Therefore, store the cached CPU caps before the update and compare them
with the CPU caps after the microcode update has succeeded.

Thus, the comparison is done between the CPUID *hardware* bits before
and after the upgrade instead of using the cached, possibly runtime
modified values in BSP's boot_cpu_data copy.

As a result, false warnings about CPUID bits changes are avoided.

  [ bp:
  	- Massage.
	- Add SRBDS_CTRL example.
	- Add kernel-doc.
	- Incorporate forgotten review feedback from dhansen.
	]

Fixes: 1008c52c ("x86/CPU: Add a microcode loader callback")
Signed-off-by: default avatarAshok Raj <ashok.raj@intel.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230109153555.4986-3-ashok.raj@intel.com


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
[ Aichun Shi: amend commit log ]
Signed-off-by: default avatarAichun Shi <aichun.shi@intel.com>
parent 94aa4d3f

arch/x86/include/asm/processor.h

+1 −0
Original line number Diff line number Diff line
@@ -870,6 +870,7 @@ bool xen_set_default_idle(void); 


void __noreturn stop_this_cpu(void *dummy);

void microcode_check(struct cpuinfo_x86 *prev_info);

void store_cpu_caps(struct cpuinfo_x86 *info);



enum l1tf_mitigations {

	L1TF_MITIGATION_OFF,

arch/x86/kernel/cpu/common.c

+23 −12
Original line number Diff line number Diff line
@@ -2164,6 +2164,25 @@ void cpu_init_secondary(void) 
#endif



#ifdef CONFIG_MICROCODE_LATE_LOADING

/**

 * store_cpu_caps() - Store a snapshot of CPU capabilities

 * @curr_info: Pointer where to store it

 *

 * Returns: None

 */

void store_cpu_caps(struct cpuinfo_x86 *curr_info)

{

	/* Reload CPUID max function as it might've changed. */

	curr_info->cpuid_level = cpuid_eax(0);



	/* Copy all capability leafs and pick up the synthetic ones. */

	memcpy(&curr_info->x86_capability, &boot_cpu_data.x86_capability,

	       sizeof(curr_info->x86_capability));



	/* Get the hardware CPUID leafs */

	get_cpu_cap(curr_info);

}



/**

 * microcode_check() - Check if any CPU capabilities changed after an update.

 * @prev_info:	CPU capabilities stored before an update.
@@ -2176,23 +2195,15 @@ void cpu_init_secondary(void) 
 */

void microcode_check(struct cpuinfo_x86 *prev_info)

{

	struct cpuinfo_x86 curr_info;



	perf_check_microcode();



	amd_check_microcode();

	/* Reload CPUID max function as it might've changed. */

	prev_info->cpuid_level = cpuid_eax(0);



	/*

	 * Copy all capability leafs to pick up the synthetic ones so that

	 * memcmp() below doesn't fail on that. The ones coming from CPUID will

	 * get overwritten in get_cpu_cap().

	 */

	memcpy(&prev_info->x86_capability, &boot_cpu_data.x86_capability,

	       sizeof(prev_info->x86_capability));



	get_cpu_cap(prev_info);

	store_cpu_caps(&curr_info);



	if (!memcmp(&prev_info->x86_capability, &boot_cpu_data.x86_capability,

	if (!memcmp(&prev_info->x86_capability, &curr_info.x86_capability,

		    sizeof(prev_info->x86_capability)))

		return;

arch/x86/kernel/cpu/microcode/core.c

+6 −0
Original line number Diff line number Diff line
@@ -624,6 +624,12 @@ static int microcode_reload_late(void) 
	atomic_set(&late_cpus_in,  0);

	atomic_set(&late_cpus_out, 0);



	/*

	 * Take a snapshot before the microcode update in order to compare and

	 * check whether any bits changed after an update.

	 */

	store_cpu_caps(&prev_info);



	ret = stop_machine_cpuslocked(__reload_late, NULL, cpu_online_mask);

	if (ret == 0)

		microcode_check(&prev_info);