Commit 94aa4d3f authored by Ashok Raj's avatar Ashok Raj Committed by Aichun Shi
Browse files

x86/microcode: Add a parameter to microcode_check() to store CPU capabilities 

stable inclusion
from stable-v5.10.173
commit 89e848bb4aa140e701eb0d017736ce5d1ee198da
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I873BU
CVE: N/A
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=89e848bb4aa140e701eb0d017736ce5d1ee198da



-------------------------------------

Intel-SIG: commit 89e848bb4aa1 x86/microcode: Add a parameter to microcode_check() to store CPU capabilities.
Backport x86/microcode related patches from 5.10.173 upstream.

-------------------------------------

[ Upstream commit ab31c744 ]

Add a parameter to store CPU capabilities before performing a microcode
update so that CPU capabilities can be compared before and after update.

  [ bp: Massage. ]

Signed-off-by: default avatarAshok Raj <ashok.raj@intel.com>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230109153555.4986-2-ashok.raj@intel.com


Stable-dep-of: c0dd9245 ("x86/microcode: Check CPU capabilities after late microcode update correctly")
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
[ Aichun Shi: amend commit log ]
Signed-off-by: default avatarAichun Shi <aichun.shi@intel.com>
parent 0345b375

arch/x86/include/asm/processor.h

+1 −1
Original line number Diff line number Diff line
@@ -869,7 +869,7 @@ bool xen_set_default_idle(void); 
#endif



void __noreturn stop_this_cpu(void *dummy);

void microcode_check(void);

void microcode_check(struct cpuinfo_x86 *prev_info);



enum l1tf_mitigations {

	L1TF_MITIGATION_OFF,

arch/x86/kernel/cpu/common.c

+13 −8
Original line number Diff line number Diff line
@@ -2164,31 +2164,36 @@ void cpu_init_secondary(void) 
#endif



#ifdef CONFIG_MICROCODE_LATE_LOADING

/*

/**

 * microcode_check() - Check if any CPU capabilities changed after an update.

 * @prev_info:	CPU capabilities stored before an update.

 *

 * The microcode loader calls this upon late microcode load to recheck features,

 * only when microcode has been updated. Caller holds microcode_mutex and CPU

 * hotplug lock.

 *

 * Return: None

 */

void microcode_check(void)

void microcode_check(struct cpuinfo_x86 *prev_info)

{

	struct cpuinfo_x86 info;



	perf_check_microcode();



	amd_check_microcode();

	/* Reload CPUID max function as it might've changed. */

	info.cpuid_level = cpuid_eax(0);

	prev_info->cpuid_level = cpuid_eax(0);



	/*

	 * Copy all capability leafs to pick up the synthetic ones so that

	 * memcmp() below doesn't fail on that. The ones coming from CPUID will

	 * get overwritten in get_cpu_cap().

	 */

	memcpy(&info.x86_capability, &boot_cpu_data.x86_capability, sizeof(info.x86_capability));

	memcpy(&prev_info->x86_capability, &boot_cpu_data.x86_capability,

	       sizeof(prev_info->x86_capability));



	get_cpu_cap(&info);

	get_cpu_cap(prev_info);



	if (!memcmp(&info.x86_capability, &boot_cpu_data.x86_capability, sizeof(info.x86_capability)))

	if (!memcmp(&prev_info->x86_capability, &boot_cpu_data.x86_capability,

		    sizeof(prev_info->x86_capability)))

		return;



	pr_warn("x86/CPU: CPU features have changed after loading microcode, but might not take effect.\n");

arch/x86/kernel/cpu/microcode/core.c

+2 −1
Original line number Diff line number Diff line
@@ -619,13 +619,14 @@ static int __reload_late(void *info) 
static int microcode_reload_late(void)

{

	int old = boot_cpu_data.microcode, ret;

	struct cpuinfo_x86 prev_info;



	atomic_set(&late_cpus_in,  0);

	atomic_set(&late_cpus_out, 0);



	ret = stop_machine_cpuslocked(__reload_late, NULL, cpu_online_mask);

	if (ret == 0)

		microcode_check();

		microcode_check(&prev_info);



	pr_info("Reload completed, microcode revision: 0x%x -> 0x%x\n",

		old, boot_cpu_data.microcode);