Commit 387e220a authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
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powerpc/64s: Move hash MMU support code under CONFIG_PPC_64S_HASH_MMU 



Compiling out hash support code when CONFIG_PPC_64S_HASH_MMU=n saves
128kB kernel image size (90kB text) on powernv_defconfig minus KVM,
350kB on pseries_defconfig minus KVM, 40kB on a tiny config.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
[mpe: Fixup defined(ARCH_HAS_MEMREMAP_COMPAT_ALIGN), which needs CONFIG.
      Fix radix_enabled() use in setup_initial_memory_limit(). Add some
      stubs to reduce number of ifdefs.]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211201144153.2456614-18-npiggin@gmail.com
parent c2857374

arch/powerpc/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -129,7 +129,7 @@ config PPC 
	select ARCH_HAS_KCOV

	select ARCH_HAS_MEMBARRIER_CALLBACKS

	select ARCH_HAS_MEMBARRIER_SYNC_CORE

	select ARCH_HAS_MEMREMAP_COMPAT_ALIGN	if PPC_BOOK3S_64

	select ARCH_HAS_MEMREMAP_COMPAT_ALIGN	if PPC_64S_HASH_MMU

	select ARCH_HAS_MMIOWB			if PPC64

	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE

	select ARCH_HAS_PHYS_TO_DMA

arch/powerpc/include/asm/book3s/64/mmu-hash.h

+7 −1
Original line number Diff line number Diff line
@@ -523,8 +523,14 @@ void slb_save_contents(struct slb_entry *slb_ptr); 
void slb_dump_contents(struct slb_entry *slb_ptr);



extern void slb_vmalloc_update(void);

extern void slb_set_size(u16 size);

void preload_new_slb_context(unsigned long start, unsigned long sp);



#ifdef CONFIG_PPC_64S_HASH_MMU

void slb_set_size(u16 size);

#else

static inline void slb_set_size(u16 size) { }

#endif



#endif /* __ASSEMBLY__ */



/*

arch/powerpc/include/asm/book3s/64/mmu.h

+18 −3
Original line number Diff line number Diff line
@@ -105,7 +105,9 @@ typedef struct { 
		 * from EA and new context ids to build the new VAs.

		 */

		mm_context_id_t id;

#ifdef CONFIG_PPC_64S_HASH_MMU

		mm_context_id_t extended_id[TASK_SIZE_USER64/TASK_CONTEXT_SIZE];

#endif

	};



	/* Number of bits in the mm_cpumask */
@@ -117,7 +119,9 @@ typedef struct { 
	/* Number of user space windows opened in process mm_context */

	atomic_t vas_windows;



#ifdef CONFIG_PPC_64S_HASH_MMU

	struct hash_mm_context *hash_context;

#endif



	void __user *vdso;

	/*
@@ -140,6 +144,7 @@ typedef struct { 
#endif

} mm_context_t;



#ifdef CONFIG_PPC_64S_HASH_MMU

static inline u16 mm_ctx_user_psize(mm_context_t *ctx)

{

	return ctx->hash_context->user_psize;
@@ -200,8 +205,15 @@ static inline struct subpage_prot_table *mm_ctx_subpage_prot(mm_context_t *ctx) 
extern int mmu_linear_psize;

extern int mmu_virtual_psize;

extern int mmu_vmalloc_psize;

extern int mmu_vmemmap_psize;

extern int mmu_io_psize;

#else /* CONFIG_PPC_64S_HASH_MMU */

#ifdef CONFIG_PPC_64K_PAGES

#define mmu_virtual_psize MMU_PAGE_64K

#else

#define mmu_virtual_psize MMU_PAGE_4K

#endif

#endif

extern int mmu_vmemmap_psize;



/* MMU initialization */

void mmu_early_init_devtree(void);
@@ -240,7 +252,8 @@ static inline void setup_initial_memory_limit(phys_addr_t first_memblock_base, 
	 * know which translations we will pick. Hence go with hash

	 * restrictions.

	 */

	return hash__setup_initial_memory_limit(first_memblock_base,

	if (!early_radix_enabled())

		hash__setup_initial_memory_limit(first_memblock_base,

						 first_memblock_size);

}
@@ -262,6 +275,7 @@ static inline void radix_init_pseries(void) { } 
void cleanup_cpu_mmu_context(void);

#endif



#ifdef CONFIG_PPC_64S_HASH_MMU

static inline int get_user_context(mm_context_t *ctx, unsigned long ea)

{

	int index = ea >> MAX_EA_BITS_PER_CONTEXT;
@@ -281,6 +295,7 @@ static inline unsigned long get_user_vsid(mm_context_t *ctx, 


	return get_vsid(context, ea, ssize);

}

#endif



#endif /* __ASSEMBLY__ */

#endif /* _ASM_POWERPC_BOOK3S_64_MMU_H_ */

arch/powerpc/include/asm/book3s/64/tlbflush-hash.h

+6 −0
Original line number Diff line number Diff line
@@ -112,8 +112,14 @@ static inline void hash__flush_tlb_kernel_range(unsigned long start, 


struct mmu_gather;

extern void hash__tlb_flush(struct mmu_gather *tlb);

void flush_tlb_pmd_range(struct mm_struct *mm, pmd_t *pmd, unsigned long addr);



#ifdef CONFIG_PPC_64S_HASH_MMU

/* Private function for use by PCI IO mapping code */

extern void __flush_hash_table_range(unsigned long start, unsigned long end);

extern void flush_tlb_pmd_range(struct mm_struct *mm, pmd_t *pmd,

				unsigned long addr);

#else

static inline void __flush_hash_table_range(unsigned long start, unsigned long end) { }

#endif

#endif /*  _ASM_POWERPC_BOOK3S_64_TLBFLUSH_HASH_H */

arch/powerpc/include/asm/book3s/pgtable.h

+4 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 
				     unsigned long size, pgprot_t vma_prot);

#define __HAVE_PHYS_MEM_ACCESS_PROT



#if defined(CONFIG_PPC32) || defined(CONFIG_PPC_64S_HASH_MMU)

/*

 * This gets called at the end of handling a page fault, when

 * the kernel has put a new PTE into the page table for the process.
@@ -35,6 +36,9 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 
 * waiting for the inevitable extra hash-table miss exception.

 */

void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep);

#else

static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep) {}

#endif



#endif /* __ASSEMBLY__ */

#endif