Commit c2857374 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/64s: Make hash MMU support configurable 



This adds Kconfig selection which allows 64s hash MMU support to be
disabled. It can be disabled if radix support is enabled, the minimum
supported CPU type is POWER9 (or higher), and KVM is not selected.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211201144153.2456614-17-npiggin@gmail.com
parent debeda01

arch/powerpc/Kconfig

+2 −1
Original line number Diff line number Diff line
@@ -846,7 +846,7 @@ config FORCE_MAX_ZONEORDER 
config PPC_SUBPAGE_PROT

	bool "Support setting protections for 4k subpages (subpage_prot syscall)"

	default n

	depends on PPC_BOOK3S_64 && PPC_64K_PAGES

	depends on PPC_64S_HASH_MMU && PPC_64K_PAGES

	help

	  This option adds support for system call to allow user programs

	  to set access permissions (read/write, readonly, or no access)
@@ -944,6 +944,7 @@ config PPC_MEM_KEYS 
	prompt "PowerPC Memory Protection Keys"

	def_bool y

	depends on PPC_BOOK3S_64

	depends on PPC_64S_HASH_MMU

	select ARCH_USES_HIGH_VMA_FLAGS

	select ARCH_HAS_PKEYS

	help

arch/powerpc/include/asm/mmu.h

+13 −3
Original line number Diff line number Diff line
@@ -157,7 +157,7 @@ DECLARE_PER_CPU(int, next_tlbcam_idx); 


enum {

	MMU_FTRS_POSSIBLE =

#if defined(CONFIG_PPC_BOOK3S_64) || defined(CONFIG_PPC_BOOK3S_604)

#if defined(CONFIG_PPC_BOOK3S_604)

		MMU_FTR_HPTE_TABLE |

#endif

#ifdef CONFIG_PPC_8xx
@@ -184,15 +184,18 @@ enum { 
		MMU_FTR_USE_TLBRSRV | MMU_FTR_USE_PAIRED_MAS |

#endif

#ifdef CONFIG_PPC_BOOK3S_64

		MMU_FTR_KERNEL_RO |

#ifdef CONFIG_PPC_64S_HASH_MMU

		MMU_FTR_NO_SLBIE_B | MMU_FTR_16M_PAGE | MMU_FTR_TLBIEL |

		MMU_FTR_LOCKLESS_TLBIE | MMU_FTR_CI_LARGE_PAGE |

		MMU_FTR_1T_SEGMENT | MMU_FTR_TLBIE_CROP_VA |

		MMU_FTR_KERNEL_RO | MMU_FTR_68_BIT_VA |

		MMU_FTR_68_BIT_VA | MMU_FTR_HPTE_TABLE |

#endif

#ifdef CONFIG_PPC_RADIX_MMU

		MMU_FTR_TYPE_RADIX |

		MMU_FTR_GTSE |

#endif /* CONFIG_PPC_RADIX_MMU */

#endif

#ifdef CONFIG_PPC_KUAP

	MMU_FTR_BOOK3S_KUAP |

#endif /* CONFIG_PPC_KUAP */
@@ -224,6 +227,13 @@ enum { 
#define MMU_FTRS_ALWAYS		MMU_FTR_TYPE_FSL_E

#endif



/* BOOK3S_64 options */

#if defined(CONFIG_PPC_RADIX_MMU) && !defined(CONFIG_PPC_64S_HASH_MMU)

#define MMU_FTRS_ALWAYS		MMU_FTR_TYPE_RADIX

#elif !defined(CONFIG_PPC_RADIX_MMU) && defined(CONFIG_PPC_64S_HASH_MMU)

#define MMU_FTRS_ALWAYS		MMU_FTR_HPTE_TABLE

#endif



#ifndef MMU_FTRS_ALWAYS

#define MMU_FTRS_ALWAYS		0

#endif
@@ -329,7 +339,7 @@ static __always_inline bool radix_enabled(void) 
	return mmu_has_feature(MMU_FTR_TYPE_RADIX);

}



static inline bool early_radix_enabled(void)

static __always_inline bool early_radix_enabled(void)

{

	return early_mmu_has_feature(MMU_FTR_TYPE_RADIX);

}

arch/powerpc/kernel/dt_cpu_ftrs.c

+10 −4
Original line number Diff line number Diff line
@@ -273,6 +273,9 @@ static int __init feat_enable_mmu_hash(struct dt_cpu_feature *f) 
{

	u64 lpcr;



	if (!IS_ENABLED(CONFIG_PPC_64S_HASH_MMU))

		return 0;



	lpcr = mfspr(SPRN_LPCR);

	lpcr &= ~LPCR_ISL;
@@ -292,6 +295,9 @@ static int __init feat_enable_mmu_hash_v3(struct dt_cpu_feature *f) 
{

	u64 lpcr;



	if (!IS_ENABLED(CONFIG_PPC_64S_HASH_MMU))

		return 0;



	lpcr = mfspr(SPRN_LPCR);

	lpcr &= ~(LPCR_ISL | LPCR_UPRT | LPCR_HR);

	mtspr(SPRN_LPCR, lpcr);
@@ -305,15 +311,15 @@ static int __init feat_enable_mmu_hash_v3(struct dt_cpu_feature *f) 


static int __init feat_enable_mmu_radix(struct dt_cpu_feature *f)

{

#ifdef CONFIG_PPC_RADIX_MMU

	if (!IS_ENABLED(CONFIG_PPC_RADIX_MMU))

		return 0;



	cur_cpu_spec->mmu_features |= MMU_FTR_KERNEL_RO;

	cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;

	cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;

	cur_cpu_spec->mmu_features |= MMU_FTR_GTSE;

	cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;



	return 1;

#endif

	return 0;

}



static int __init feat_enable_dscr(struct dt_cpu_feature *f)

arch/powerpc/kvm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -69,6 +69,7 @@ config KVM_BOOK3S_64 
	select KVM_BOOK3S_64_HANDLER

	select KVM

	select KVM_BOOK3S_PR_POSSIBLE if !KVM_BOOK3S_HV_POSSIBLE

	select PPC_64S_HASH_MMU

	select SPAPR_TCE_IOMMU if IOMMU_SUPPORT && (PPC_PSERIES || PPC_POWERNV)

	help

	  Support running unmodified book3s_64 and book3s_32 guest kernels

arch/powerpc/mm/init_64.c

+11 −2
Original line number Diff line number Diff line
@@ -472,8 +472,12 @@ void __init mmu_early_init_devtree(void) 
	bool hvmode = !!(mfmsr() & MSR_HV);



	/* Disable radix mode based on kernel command line. */

	if (disable_radix)

	if (disable_radix) {

		if (IS_ENABLED(CONFIG_PPC_64S_HASH_MMU))

			cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX;

		else

			pr_warn("WARNING: Ignoring cmdline option disable_radix\n");

	}



	of_scan_flat_dt(dt_scan_mmu_pid_width, NULL);

	if (hvmode && !mmu_lpid_bits) {
@@ -498,6 +502,7 @@ void __init mmu_early_init_devtree(void) 


	if (early_radix_enabled()) {

		radix__early_init_devtree();



		/*

		 * We have finalized the translation we are going to use by now.

		 * Radix mode is not limited by RMA / VRMA addressing.
@@ -507,5 +512,9 @@ void __init mmu_early_init_devtree(void) 
		memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE);

	} else

		hash__early_init_devtree();



	if (!(cur_cpu_spec->mmu_features & MMU_FTR_HPTE_TABLE) &&

	    !(cur_cpu_spec->mmu_features & MMU_FTR_TYPE_RADIX))

		panic("kernel does not support any MMU type offered by platform");

}

#endif /* CONFIG_PPC_BOOK3S_64 */